Multi-Chip Module Test Strategies

  • Yervant Zorian

Part of the Frontiers in Electronic Testing book series (FRET, volume 7)

Table of contents

  1. Front Matter
    Pages 1-6
  2. Introduction

    1. Yervant Zorian, V. D. Agrawal
      Pages 7-14
  3. Die Level Testing

    1. Larry Gilg, Y. Zorian
      Pages 15-25
  4. Substrate Testing

    1. Madhavan Swaminathan, Bruce Kim, Abhijit Chatterjee, Y. Zorian
      Pages 27-38
    2. Anne E. Gattiker, Wojciech Maly, Y. Zorian
      Pages 39-53
    3. R. Schmid, R. Schmitt, M. Brunner, O. Gessner, M. Sturm, Y. Zorian
      Pages 55-63
  5. Module Level Test

    1. Yervant Zorian, Hakim Bederr, V. D. Agrawal
      Pages 87-95
  6. MCM Test Applications

    1. Joel A. Jorgenson, Russell J. Wagner, Y. Zorian
      Pages 97-108
    2. Thomas M. Storey, Bruce McWilliam, Y. Zorian
      Pages 109-118
  7. Module Level Diagnosis

    1. P. Nagvajara, J. Lin, P. Nilagupta, C. Wang, Y. Zorian
      Pages 127-135
  8. Simulation Techniques for MCMs

    1. Mick Tegethoff, Tom Chen, Y. Zorian
      Pages 137-149
  9. MCM Test Economics

    1. Cynthia F. Murphy, Magdy S. Abadir, Peter A. Sandborn, Y. Zorian
      Pages 151-166
  10. Back Matter
    Pages 167-167

About this book


MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs.
Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain.
Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2).


VLSI complexity diagnosis manufacturing simulation testing

Editors and affiliations

  • Yervant Zorian
    • 1
  1. 1.Logic Vision, Inc.USA

Bibliographic information

  • DOI
  • Copyright Information Kluwer Academic Publishers 1997
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4613-7798-6
  • Online ISBN 978-1-4615-6107-1
  • Series Print ISSN 0929-1296
  • Buy this book on publisher's site
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