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An ASIC Low Power Primer

Analysis, Techniques and Specification

  • Rakesh Chadha
  • J. Bhasker

Table of contents

  1. Front Matter
    Pages i-xiv
  2. Rakesh Chadha, J. Bhasker
    Pages 1-7
  3. Rakesh Chadha, J. Bhasker
    Pages 9-26
  4. Rakesh Chadha, J. Bhasker
    Pages 27-44
  5. Rakesh Chadha, J. Bhasker
    Pages 45-65
  6. Rakesh Chadha, J. Bhasker
    Pages 67-91
  7. Rakesh Chadha, J. Bhasker
    Pages 93-111
  8. Rakesh Chadha, J. Bhasker
    Pages 113-138
  9. Rakesh Chadha, J. Bhasker
    Pages 139-155
  10. Rakesh Chadha, J. Bhasker
    Pages 157-188
  11. Back Matter
    Pages 189-217

About this book

Introduction

This book provides an invaluable primer on the techniques utilized in the design of low power digital semiconductor devices.  Readers will benefit from the hands-on approach which starts form the ground-up, explaining with basic examples what power is, how it is measured and how it impacts on the design process of application-specific integrated circuits (ASICs).  The authors use both the Unified Power Format (UPF) and Common Power Format (CPF) to describe in detail the power intent for an ASIC and then guide readers through a variety of architectural and implementation techniques that will help meet the power intent.  From analyzing system power consumption, to techniques that can employed in a low power design, to a detailed description of two alternate standards for capturing the power directives at various phases of the design, this book is filled with information that will give ASIC designers a competitive edge in low-power design.

  • Starts from the ground-up and explains what power is, how it is measured and how it impacts on the ASIC design process;
  •       Provides essential information in an easy to read and understand format, using basic examples;
  • Explains what power intent is, how to describe it precisely and what techniques can be used to achieve the power intent with the two key standards, the Unified Power Format (UPF) and Common Power Format (CPF).     

Keywords

CPF Common Power Format Design Intent for Power Management Low Power ASIC Design Low Power Design Low Power Digital Design Power Intent UPF Unified Power Format

Authors and affiliations

  • Rakesh Chadha
    • 1
  • J. Bhasker
    • 2
  1. 1.eSilicon CorporationNew ProvidenceUSA
  2. 2.eSilicon CorporationAllentownUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4614-4271-4
  • Copyright Information Springer Science+Business Media New York 2013
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4614-4270-7
  • Online ISBN 978-1-4614-4271-4
  • Buy this book on publisher's site
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