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Multi-objective Design Space Exploration of Multiprocessor SoC Architectures

The MULTICUBE Approach

  • Book
  • © 2011

Overview

Editors:
  1. Cristina Silvano

    1. Dipto. Elettronica e Informazione (DEI), Politecnico di Milano, Milano, Italy

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  2. William Fornaciari

    1. , Dipartimento di Elettronica e Informazio, Politecnico di Milano, Milano, Italy

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  3. Eugenio Villar

    1. Depto. Tecnología Electrónica e, Ing. Sistemas y Automática (TEISA), Universidad Cantabria, Santander, Spain

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  • Describes the MULTICUBE Design Space Exploration methodology, which provides a multi-level system specification and modeling framework to provide static and dynamic evaluation of the system-level metrics
  • Provides a common tool interface composed of several layers that are connected through standardized interfaces
  • Offers a short path to real design space exploration, through use of industrial design flows for examples and tools, as well as downloadable, open source tools to support the case studies Includes optimizations in areas such as multi-processor architectures, Multimedia, power consumption, design time, system-level simulation and profiling, run-time management of resources, Linux frameworks, SystemC, etc
  • Includes supplementary material: sn.pub/extras

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Table of contents (10 chapters)

  1. Front Matter

    Pages 1-21
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  2. Methodologies and Tools

    1. Front Matter

      Pages 1-1
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    2. The MULTICUBE Design Flow

      • Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martinez et al.
      Pages 3-17

    3. M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration

      • Hector Posadas, Sara Real, Eugenio Villar
      Pages 19-50

    4. Optimization Algorithms for Design Space Exploration of Embedded Systems

      • Enrico Rigoni, Carlos Kavka, Alessandro Turco, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria et al.
      Pages 51-74

    5. Response Surface Modeling for Design Space Exploration of Embedded System

      • Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Enrico Rigoni, Carlos Kavka, Alessandro Turco et al.
      Pages 75-92

    6. Design Space Exploration Supporting Run-Time Resource Management

      • Prabhat Avasare, Chantal Ykman-Couvreur, Geert Vanmeerbeeck, Giovanni Mariani, Gianluca Palermo, Cristina Silvano et al.
      Pages 93-107

    7. Run-Time Resource Management at the Operating System level

      • Patrick Bellasi, Simone Corbetta, William Fornaciari
      Pages 109-141

  3. Application Domains

    1. Front Matter

      Pages 143-143
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    2. High-level modeling and exploration of a powerline communication network based on System-on-Chip

      • Marcos Martinez, David Ferruz, Hector Posadas, Eugenio Villar
      Pages 145-170

    3. Design Space Exploration of Parallel Architectures

      • Carlos Kavka, Luka Onesti, Enrico Rigoni, Alessandro Turco, Sara Bocchio, Fabrizio Castro et al.
      Pages 171-188

    4. Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming

      • Giovanni Mariani, Chantal Ykman-Couvreur, Prabhat Avasare, Geert Vanmeerbeeck, Gianluca Palermo, Cristina Silvano et al.
      Pages 189-204

    5. Conclusions

      • Cristina Silvano
      Pages 205-206

  4. Back Matter

    Pages 223-223
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Keywords

About this book

This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives.  It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc.  Coverage focuses on the design of complex multimedia applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer’s goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.

Editors and Affiliations

  • Dipto. Elettronica e Informazione (DEI), Politecnico di Milano, Milano, Italy

    Cristina Silvano

  • , Dipartimento di Elettronica e Informazio, Politecnico di Milano, Milano, Italy

    William Fornaciari

  • Depto. Tecnología Electrónica e, Ing. Sistemas y Automática (TEISA), Universidad Cantabria, Santander, Spain

    Eugenio Villar

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