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Reliability of Nanoscale Circuits and Systems

Methodologies and Circuit Architectures

  • Miloš Stanisavljević
  • Alexandre Schmid
  • Yusuf Leblebici

Table of contents

  1. Front Matter
    Pages i-xxvii
  2. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 1-6
  3. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 7-18
  4. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 19-34
  5. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 35-47
  6. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 49-61
  7. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 63-92
  8. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 93-119
  9. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 121-166
  10. Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebici
    Pages 167-170
  11. Back Matter
    Pages 171-195

About this book

Introduction

Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures Milos Stanisavljevic Alexandre Schmid Yusuf Leblebici Future integrated circuits are expected to be made of emerging nanodevices and their associated interconnects, but the reliability of such components is a major threat to the design of future integrated computing systems. Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures confronts that challenge. The first part discusses the state-of-the-art of the circuits and systems as well as the architectures and methodologies focusing the enhancement of the reliability of digital integrated circuits. It proposes circuit and system level solutions to overcome high defect density and presents reliability, fault models and fault tolerance. It includes an overview of nano-technologies that are considered in the fabrication of future integrated circuits and covers solutions provided in the early ages of CMOs as well as recent techniques. The second part of the text analyzes original circuit and system level solutions. It details an architecture suitable for circuit-level and gate-level redundant modules implementation and exhibiting significant immunity to permanent and random failures as well as unwanted fluctuation and the fabrication parameters. It also proposes a novel general method enabling the introduction of fault-tolerance and evaluation of the circuit and architecture reliability. And the third part proposes a new methodology that introduces reliability in existing design flows. That methodology consists of partitioning the full system to design into reliability optimal partitions and applying reliability evaluation and optimization at local and system level.

Keywords

Averaging Design Implementations Fault Models Fault-Tolerant Approaches Fault-Tolerant Architectures Faults Nanodevices Nanotechnology Reliability Reliability Evaluation Techniques Statistical Evaluation of Fault-Tolerance Using Probability System Level Reliability Evaluation and Optimization

Authors and affiliations

  • Miloš Stanisavljević
    • 1
  • Alexandre Schmid
    • 2
  • Yusuf Leblebici
    • 3
  1. 1.de Lausanne, Microelectronic Systems Lab.Ecole Polytechnique FederaleLausanneSwitzerland
  2. 2.de Lausanne, Microelectronic Systems Lab.Ecole Polytechnique FederaleLausanneSwitzerland
  3. 3.de Lausanne, Microelectronic Systems Lab.Ecole Polytechnique FederaleLausanneSwitzerland

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4419-6217-1
  • Copyright Information Springer Science+Business Media, LLC 2011
  • Publisher Name Springer, New York, NY
  • eBook Packages Engineering
  • Print ISBN 978-1-4419-6216-4
  • Online ISBN 978-1-4419-6217-1
  • Buy this book on publisher's site
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