On and Off-Chip Crosstalk Avoidance in VLSI Design

  • Chunjie Duan
  • Brock J. LaMeres
  • Sunil P. Khatri

Table of contents

  1. Front Matter
    Pages 1-24
  2. On-Chip Crosstalk and Avoidance

    1. Front Matter
      Pages 20-20
    2. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 3-11
    3. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 13-26
    4. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 27-45
    5. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 47-72
    6. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 73-86
    7. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 87-99
    8. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 101-103
  3. Off-Chip Crosstalk and Avoidance

    1. Front Matter
      Pages 105-105
    2. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 107-124
    3. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 125-136
    4. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 137-144
    5. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 145-160
    6. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 161-166
    7. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 167-187
    8. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 189-199
    9. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 201-218
    10. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 219-226
    11. Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri
      Pages 227-229

About this book

Introduction

On- and Off-Chip Crosstalk Avoidance in VLSI Design

Chunjie Duan, Brock J. LaMeres and Sunil P. Khatri


Deep Submicron (DSM) processes present many challenges to Very Large Scale Integration (VLSI) circuit designers. One of the greatest challenges is inter-wire crosstalk within on- and off-chip bus traces. Capacitive crosstalk in on-chip busses becomes significant with shrinking feature sizes of VLSI fabrication processes, while inductive cross-talk becomes a problem for busses with high off-chip data transfer rates. The presence of crosstalk greatly limits the speed and increases the power consumption of an IC design.

This book presents approaches to avoid crosstalk in both on-chip as well as off-chip busses. These approaches allow the user to trade off the degree of crosstalk mitigation against the associated implementation overheads. In this way, a continuum of techniques is presented, which help improve the speed and power consumption of the bus interconnect. These techniques encode data before transmission over the bus to avoid certain undesirable crosstalk conditions and thereby improve the bus speed and/or energy consumption. In particular, this book:

  • Presents novel ways to combine chip and package design, reducing off-chip crosstalk so that VLSI systems can be designed to operate significantly faster;
  • Provides a comprehensive set of bus crosstalk cancellation techniques, both memoryless and memory-based;
  • Provides techniques to design extremely efficient CODECs for crosstalk cancellation;
  • Provides crosstalk cancellation approaches for multi-valued busses;
  • Offers a battery of approaches for a VLSI designer to use, depending on the amount of crosstalk their design can tolerate, and the amount of area overhead they can afford.

Keywords

Crosstalk Avoidance EDA Noise Reduction Off-Chip Communication On-Chip Communication VLSI VLSI Design VLSI Packaging circuit design construction design automation electronic design automation integrated circuit model modeling

Authors and affiliations

  • Chunjie Duan
    • 1
  • Brock J. LaMeres
    • 2
  • Sunil P. Khatri
    • 3
  1. 1.Laboratories (MERL)Mitsubishi Electric ResearchCambridgeU.S.A.
  2. 2.Dept. Electrical & Computer EngineeringMontana State UniversityBozemanU.S.A.
  3. 3.Dept. Electrical & Computer EngineeringTexas A & M UniversityCollege StationU.S.A.

Bibliographic information

  • DOI https://doi.org/10.1007/978-1-4419-0947-3
  • Copyright Information Springer Science+Business Media, LLC 2010
  • Publisher Name Springer, Boston, MA
  • eBook Packages Engineering
  • Print ISBN 978-1-4419-0946-6
  • Online ISBN 978-1-4419-0947-3
  • About this book
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