Skip to main content

Functional Design Errors in Digital Circuits

Diagnosis Correction and Repair

  • Book
  • © 2009

Overview

  • Coverage of novel techniques to automate IC debugging, a subject rarely covered in other books
  • Comprehensive scope and solutions: from RTL to post-silicon debugging
  • The innovative techniques covered in this book are recent and have been featured by MIT Technology Review, EE Times, SCD Source, IEEE Computer, and other sources
  • First empirical comparison of several methods for spare-cell insertion
  • A variety of examples and figures to illustrate key concepts and algorithms

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 32)

This is a preview of subscription content, log in via an institution to check access.

Access this book

eBook USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Licence this eBook for your library

Institutional subscriptions

Table of contents (13 chapters)

  1. Background and Prior Art

  2. FogClear Methodologies and Theoretical Advances in Error Repair

  3. FogClear Components

Keywords

About this book

Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Authors and Affiliations

  • Dept. Electrical Engineering & Computer Science, University of Michigan, Ann Arbor, USA

    Kai-hui Chang, Igor L. Markov, Valeria Bertacco

About the authors

Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors

Bibliographic Information

Publish with us