Robustness and Usability in Modern Design Flows

1. Front Matter

   Pages i-xvii

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2. Introduction

   Pages 1-7

3. Preliminaries

   Pages 9-35

4. Algorithms and Data Structures

   Pages 37-49

5. Synthesis

   Pages 51-73

6. Property Generation

   Pages 75-97

7. Diagnosis

   Pages 99-148

8. Summary and Conclusions

   Pages 149-150

9. Back Matter

   Pages 151-166

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The size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore, today’s design ?ow has to be improved to achieve a higher productivity. In this book the current design methodology and ver- cation methodology are analyzed, a number of de?ciencies are identi?ed, and solutions are suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major - sign problems are targeted. In particular, a complete tool ?ow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Veri?cation issues are covered in even more detail. A whole new paradigm for formal design veri?cation is suggested. This is based upon design und- standing, the automatic generation of properties, and powerful tool support for debugging failures. All these new techniques are empirically evaluated and - perimental results are provided. As a result, an enhanced design ?ow is created that provides more automation (i.e. better usability) and reduces the probability of introducing conceptual errors (i.e. higher robustness). Acknowledgments We would like to thank all members of the research group for computer arc- tecture in Bremen for the helpful discussions and the great atmosphere during work and research.

• Debugging
• Design Methodology
• Erfüllbarkeitsproblem der Aussagenlogik
• Formal Methods
• Testing
• Usability
• algorithms
• data structures
• formal verification
• integrated circuit
• verification

From the reviews:

“The authors, Gorschwin Fey and Rolf Drechsler, have identified several deficiencies in the design steps and manual fault diagnosis and have proposed a number of methods to alleviate the problems. … The book is a useful contribution to circuit design productivity and reliability.”­­­ (Nirode C. Mohanty, Zentralblatt MATH, Vol. 1198, 2010)

• University of Bremen, UK

  Görschwin Fey, Rolf Drechsler

Prof. Rolf Drechsler has authored and edited numerous books for Springer

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