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  • Book
  • © 2009

High Speed Serdes Devices and Applications

Authors:

  1. James Donald Rockrohr
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  2. Amanullah Mohammad
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  3. Clarence Rosser Ogilvie
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  4. Kent Dramstad
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  5. Michael A. Sorna
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  6. Jeanne Trinko Mechler
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  7. David Robert Stauffer
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  • Provides information on the features and functions typically found on HSS devices
  • Explains how HSS devices are used in protocol applications
  • Describes the features, functions, and considerations associated with designing and analyzing a reference clock distribution network
  • Includes information on how to test HSS hardware and analyze signal integrity
  • Discusses special topics related to design kits for HSS cores

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Table of contents (10 chapters)

  1. Front Matter

    Pages i-xiv
    PDF

  2. Serdes Concepts

    • James Donald Rockrohr
    Pages 1-29

  3. HSS Features and Functions

    • James Donald Rockrohr
    Pages 31-98

  4. HSS Architecture and Design

    • James Donald Rockrohr
    Pages 99-124

  5. Protocol Logic and Specifications

    • James Donald Rockrohr
    Pages 125-164

  6. Overview of Protocol Standards

    • James Donald Rockrohr
    Pages 165-261

  7. Reference Clocks

    • James Donald Rockrohr
    Pages 263-296

  8. Test and Diagnostics

    • James Donald Rockrohr
    Pages 297-344

  9. Signal Integrity

    • James Donald Rockrohr
    Pages 345-396

  10. Power Analysis

    • James Donald Rockrohr
    Pages 397-424

  11. Chip Integration

    • James Donald Rockrohr
    Pages 425-474

  12. Back Matter

    Pages 475-484
    PDF
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About this book

The simplest method of transferring data through the inputs or outputs of a silicon chip is to directly connect each bit of the datapath from one chip to the next chip. Once upon a time this was an acceptable approach. However, one aspect (and perhaps the only aspect) of chip design which has not changed during the career of the authors is Moore’s Law, which has dictated substantial increases in the number of circuits that can be manufactured on a chip. The pin densities of chip packaging technologies have not increased at the same pace as has silicon density, and this has led to a prevalence of High Speed Serdes (HSS) devices as an inherent part of almost any chip design. HSS devices are the dominant form of input/output for many (if not most) high-integration chips, moving serial data between chips at speeds up to 10 Gbps and beyond. Chip designers with a background in digital logic design tend to view HSS devices as simply complex digital input/output cells. This view ignores the complexity associated with serially moving billions of bits of data per second. At these data rates, the assumptions associated with digital signals break down and analog factors demand consideration. The chip designer who oversimplifies the problem does so at his or her own peril.
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Buy it now

eBook USD 169.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

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