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Compilation Techniques for Reconfigurable Architectures

  • Book
  • © 2009

Overview

Authors:
  1. João M.P. Cardoso

    1. Instituto de Engenharia de Sistemas e, Computadores Investigação e, Universidade Nova de Lisboa, Lisboa, Portugal

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  2. Pedro C. Diniz

    1. Instituto de Engenharia de Sistemas e, Computadores Investigação e, Universidade Nova de Lisboa, Lisboa, Portugal

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  • Introduces hardware compilation and reconfigurable computing architectures

  • Presents a range of compiler code transformations and mapping techniques focusing on imperative programming languages

  • Bridges the gap between software compilation, hardware compilation, and synthesis domains

  • Brings a number of compilation techniques together into one structured source, and includes representative examples of their applications

  • Provides a historical perspective on representative compilation research efforts over the last 15 years

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Table of contents (8 chapters)

  1. Front Matter

    Pages i-xii
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  2. Introduction

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 1-6

  3. Overview of Reconfigurable Architectures

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 7-32

  4. Compilation and Synthesis Flows

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 33-65

  5. Code Transformations

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 67-107

  6. Mapping and Execution Optimizations

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 109-154

  7. Compilers for Reconfigurable Architectures

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 155-176

  8. Perspectives on Programming Reconfigurable Computing Platforms

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 177-189

  9. Final Remarks

    • João M. P. Cardoso, Pedro C. Diniz
    Pages 191-192

  10. Back Matter

    Pages 193-223
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Keywords

About this book

The extreme ?exibility of recon?gurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of recon?gurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these recon?gurable architectures, programmers are forced to map their applications, typically written in high-level imperative programming l- guages, such as C or MATLAB, to hardware-oriented languages such as VHDL or Verilog. In this process, they must assume the role of hardware designers and software programmers and navigate a maze of program transformations, mapping, and synthesis steps to produce ef?cient recon?gurable computing implementations. The richness and sophistication of any of these application mapping steps make the mapping of computations to these architectures an increasingly daunting process. It is thus widely believed that automatic compilation from high-level programming languages is the key to the success of recon?gurable computing. This book describes a wide range of code transformations and mapping te- niques for programs described in high-level programming languages, most - tably imperative languages, to recon?gurable architectures.

Authors and Affiliations

  • Instituto de Engenharia de Sistemas e, Computadores Investigação e, Universidade Nova de Lisboa, Lisboa, Portugal

    João M.P. Cardoso, Pedro C. Diniz

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