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  • Conference proceedings
  • © 1990

Automatic Verification Methods for Finite State Systems

International Workshop, Grenoble, France. June 12-14, 1989. Proceedings

Editors:

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 407)

Conference series link(s): CAV: International Conference on Computer Aided Verification

Conference proceedings info: CAV 1989.

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Table of contents (31 papers)

  1. Temporal logic case study

    • William G. Wood
    Pages 257-263
  2. The complexity of collapsing reachability graphs

    • Sudhir Aggarwal, Daniel Barbara, Walter Cunto, Michael R. Garey
    Pages 264-274
  3. What are the limits of model checking methods for the verification of real life protocols?

    • S. Graf, J.-L. Richier, C. Rodríguez, J. Voiron
    Pages 275-285
  4. Requirement analysis for communication protocols

    • Pierre Azema, François Vernadat, Jean-Christophe Lloret
    Pages 286-293
  5. State exploration by transformation with lola

    • Juan Quemada, Santiago Pavón, Angel Fernández
    Pages 294-302
  6. Combining CTL, trace theory and timing models

    • Jerry R. Burch
    Pages 334-348
  7. Localized verification of circuit descriptions

    • Jørgen Staunstrup, Stephen J. Garland, John V. Guttag
    Pages 349-364
  8. Verification of synchronous sequential machines based on symbolic execution

    • Olivier Coudert, Christian Berthet, Jean Christophe Madre
    Pages 365-373
  9. Parallel composition of lockstep synchronous processes for hardware validation: Divide-and-conquer composition

    • Ganesh C. Gopalakrishnan, Narayana S. Mani, Venkatesh Akella
    Pages 374-382

Other Volumes

  1. Automatic Verification Methods for Finite State Systems

About this book

This volume contains the proceedings of a workshop held in Grenoble in June 1989. This was the first workshop entirely devoted to the verification of finite state systems. The workshop brought together researchers and practitioners interested in the development and use of methods, tools and theories for automatic verification of finite state systems. The goal at the workshop was to compare verification methods and tools to assist the applications designer. The papers in this volume review verification techniques for finite state systems and evaluate their relative advantages. The techniques considered cover various specification formalisms such as process algebras, automata and logics. Most of the papers focus on exploitation of existing results in three application areas: hardware design, communication protocols and real-time systems.

Bibliographic Information

Buy it now

Buying options

Softcover Book USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access