Cryptographic Hardware and Embedded Systems - CHES 2002

1. RSA Implementation

   1. Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures

      • C. Aumüller, P. Bier, W. Fischer, P. Hofreiter, J.-P. Seifert

      Pages 260-275

2. Finite Field and Modular Arithmetic II

   1. Some Security Aspects of the MIST Randomized Exponentiation Algorithm

      • Colin D. Walter

      Pages 276-290

   2. The Montgomery Powering Ladder

      • Marc Joye, Sung-Ming Yen

      Pages 291-302

   3. DPA Countermeasures by Improving the Window Method

      • Kouichi Itoh, Jun Yajima, Masahiko Takenaka, Naoya Torii

      Pages 303-317

   4. Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions

      • Martijn Stam, Arjen K. Lenstra

      Pages 318-332

3. Elliptic Curve Cryptography II

   1. On the Efficient Generation of Elliptic Curves over Prime Fields

      • Elisavet Konstantinou, Yiannis C. Stamatiou, Christos Zaroliagis

      Pages 333-348

   2. An End-to-End Systems Approach to Elliptic Curve Cryptography

      • Nils Gura, Sheueling Chang Shantz, Hans Eberle, Sumit Gupta, Vipul Gupta, Daniel Finchelstein et al.

      Pages 349-365

   3. A Low-Power Design for an Elliptic Curve Digital Signature Chip

      • Richard Schroeppel, Cheryl Beaver, Rita Gonzales, Russell Miller, Timothy Draelos

      Pages 366-380

   4. A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over \( \mathbb{G}\mathbb{F}\left( {2^n } \right) \)

      • M. Ernst, M. Jung, F. Madlener, S. Huss, R. Blümel

      Pages 381-399

   5. Genus Two Hyperelliptic Curve Coprocessor

      • N. Boston, T. Clancy, Y. Liow, J. Webster

      Pages 400-414

4. Random Number Generation

   1. True Random Number Generator Embedded in Reconfigurable Hardware

      • Viktor Fischer, Miloš Drutarovský

      Pages 415-430

   2. Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications

      • Werner Schindler, Wolfgang Killmann

      Pages 431-449

   3. A Hardware Random Number Generator

      • Thomas E. Tkacik

      Pages 450-453

5. Invited Talk

   1. RFID Systems and Security and Privacy Implications

      • Sanjay E. Sarma, Stephen A. Weis, Daniel W. Engels

      Pages 454-469

6. New Primitives

   1. A New Class of Invertible Mappings

      • Alexander Klimov, Adi Shamir

      Pages 470-483

7. Finite Field and Modular Arithmetic II

   1. Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2n)

      • Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, Erkay Savaş, RCCetin K. Koç

      Pages 484-499

   2. Dual-Field Arithmetic Unit for GF(p) and GF(2^m)

      • Johannes Wolkerstorfer

      Pages 500-514

   3. Error Detection in Polynomial Basis Multipliers over Binary Extension Fields

      • Arash Reyhani-Masoleh, M.A. Hasan

      Pages 515-528

   4. Hardware Implementation of Finite Fields of Characteristic Three

      • D. Page, N.P. Smart

      Pages 529-539

8. Elliptic Curve Cryptography III

   1. Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication

      • Mathieu Ciet, Jean-Jacques Quisquater, Francesco Sica

      Pages 540-550

ThesearetheproceedingsofCHES2002,theFourthWorkshoponCryptographic Hardware and Embedded Systems. After the ?rst two CHES Workshops held in Massachusetts, and the third held in Europe, this is the ?rst Workshop on the West Coast of the United States. There was a record number of submissions this year and in response the technical program was extended to 3 days. As is evident by the papers in these proceedings, there have been again many excellent submissions. Selecting the papers for this year’s CHES was not an easy task, and we regret that we could not accept many contributions due to the limited availability of time. There were 101 submissions this year, of which 39 were selected for presentation. We continue to observe a steady increase over previous years: 42 submissions at CHES ’99, 51 at CHES 2000, and 66 at CHES 2001. We interpret this as a continuing need for a workshop series that c- bines theory and practice for integrating strong security features into modern communicationsandcomputerapplications. Inadditiontothesubmittedcont- butions, Jean-Jacques Quisquater (UCL, Belgium), Sanjay Sarma (MIT, USA) and a panel of experts on hardware random number generation gave invited talks. As in the previous years, the focus of the Workshop is on all aspects of cr- tographic hardware and embedded system security. Of special interest were c- tributionsthatdescribenewmethodsfore?cienthardwareimplementationsand high-speed software for embedded systems, e. g. , smart cards, microprocessors, DSPs, etc. CHES also continues to be an important forum for new theoretical and practical ?ndings in the important and growing ?eld of side-channel attacks.

• DES
• Error-correcting Code
• FPGA-based attacks
• Hardware
• IT architecture
• Radio-Frequency Identification (RFID)
• architecture
• calculus
• cryptanalysis
• cryptographic hardware
• embedded cyrptographic systems
• network security
• robust security
• security
• systems security

• RSA Laboratories, Bedford, USA

  Burton S. Kaliski

• Oregon State University, Oregon, USA

  çetin K. Koç

• Ruhr-Universität Bochum, Bochum, Germany

  Christof Paar

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