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  • Conference proceedings
  • © 1986

CONPAR 86

Conference on Algorithms and Hardware for Parallel Processing, Aachen, September 17 - 19, 1986. Proceedings

Editors:

  1. Wolfgang Händler
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  2. Dieter Haupt
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  3. Rolf Jeltsch
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  4. Wilfried Juling
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  5. Otto Lange
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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 237)

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Table of contents (49 papers)

  1. Synthesis of systolic algorithms and processor arrays

    • Nikolay Petkov Turkedjiev
    Pages 165-172

  2. Fraktale und ihre Untersuchung mit Parallelrechnung

    • R. Böhm, D. Homeister
    Pages 173-182

  3. A parallel processing algorithm for thinning digitised pictures

    • RH Perrott, C Holt, M Clint, A Stewart
    Pages 183-189

  5. A general purpose pipelined ring architecture

    • K. von der Heide
    Pages 198-205

  6. An adaptive parallel algorithm for display of CSG objects

    • David T Morris, Peter M Dew
    Pages 206-213

  8. Information processing with associative processors

    • Hans-Albert Schneider, Werner Dilger
    Pages 222-229

  11. Gauss elimination algorithms for mimd computers

    • M. Cosnard, M. Marrakchi, Y. Robert, D. Trystram
    Pages 247-254

  14. Generalized asynchronous iterations

    • Aydin Uresin, Michel Dubois
    Pages 272-278

  16. Semi-automatic parallelization of fortran programs

    • Hans P. Zima, Heinz-J. Bast, Michael Gerndt, Peter J. Hoppen
    Pages 287-294

  19. Hierarchical array processor system (HAP)

    • Shigeharu Momoi, Shigeo Shimada, Masamitsu Kobayashi, Tsutomu Ishikawa
    Pages 311-318

  20. Ocsamo a systolic array for matrix operations

    • A. A. Abdel Kader
    Pages 319-328
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Bibliographic Information

  • Book Title: CONPAR 86

  • Book Subtitle: Conference on Algorithms and Hardware for Parallel Processing, Aachen, September 17 - 19, 1986. Proceedings

  • Editors: Wolfgang Händler, Dieter Haupt, Rolf Jeltsch, Wilfried Juling, Otto Lange

  • Series Title: Lecture Notes in Computer Science

  • DOI: https://doi.org/10.1007/3-540-16811-7

  • Publisher: Springer Berlin, Heidelberg

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer-Verlag Berlin Heidelberg 1986

  • Softcover ISBN: 978-3-540-16811-9Published: 01 September 1986

  • eBook ISBN: 978-3-540-44856-3Published: 13 July 2005

  • Series ISSN: 0302-9743

  • Series E-ISSN: 1611-3349

  • Edition Number: 1

  • Number of Pages: XII, 424

  • Topics: Processor Architectures, Arithmetic and Logic Structures

  • Industry Sectors: IT & Software

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Softcover Book USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

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