Field Programmable Logic and Applications

1. Reconfigurable Computing

   1. Reconfigurable Computing in Remote and Harsh Environments

      • Gordon Brebner, Neil Bergmann

      Pages 195-204

   2. Communication Synthesis for Reconfigurable Embedded Systems

      • Michael Eisenring, Marco Platzner, Lothar Thiele

      Pages 205-214

   3. Run-Time Parameterizable Cores

      • Steven A. Guccione, Delon Levi

      Pages 215-222

2. Applications

   1. Rendering PostScript TM Fonts on FPGAs

      • Donald MacVicar, John W Patterson, Satnam Singh

      Pages 223-232

   2. Implementing PhotoShopTM Filters in VirtexTM

      • Stefan Ludwig, Robert Slous, Satnam Singh

      Pages 233-242

   3. Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler

      • Klaus Feske, Michael Scholz, Günther Döring, Denis Nareike

      Pages 243-252

   4. Quantitative Analysis of Run-Time Reconfigurable Database Search

      • N. Shirazi, W. Luk, D. Benyamin, P. Y. K. Cheung

      Pages 253-263

3. Novel Architectures

   1. An On-Line Arithmetic Based FPGA for Low-Power Custom Computing

      • Arnaud Tisserand, Pierre Marchal, Christian Piguet

      Pages 264-273

   2. A New Switch Block for Segmented FPGAs

      • M. Imran Masud, Steven J. E. Wilton

      Pages 274-281

   3. PulseDSP – A Signal Processing Oriented Programmable Architecture

      • Gareth Jones

      Pages 282-290

4. Machine Applications

   1. FPGA Viruses

      • Ilija Hadžić, Sanjay Udani, Jonathan M. Smith

      Pages 291-300

   2. Genetic Programming Using Self-Reconfigurable FPGAs

      • Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna

      Pages 301-312

   3. Specification, Implementation and Testing of HFSMs in Dynamically Reconfigurable FPGAs

      • Arnaldo Oliveira, Andreia Melo, Valery Sklyarov

      Pages 313-322

   4. Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs

      • George A. Constantinides, Peter Y. K. Cheung, Wayne Luk

      Pages 323-332

5. Short Papers

   1. An FPGA-Based Prototyping System for Real-Time Verification of Video Processing Schemes

      • Holger Kropp, Carsten Reuter, Matthias Wiege, Tien-Toan Do, Peter Pirsch

      Pages 333-338

   2. An FPGA Implementation of Goertzel Algorithm

      • Tomas Dulik

      Pages 339-346

   3. Pipelined Multipliers and FPGA Architectures

      • Mathew Wojko

      Pages 347-352

   4. FPGA Design Trade-Offs for Solving the Key Equation in Reed-Solomon Decoding

      • Emanuel M. Popovici, Patrick Fitzpatrick, Colin C. Murphy

      Pages 353-358

   5. Reconfigurable Multiplier for Virtex FPGA Family

      • Juri Põldre, Kalle Tammemäe

      Pages 359-364

   6. Pipelined Floating Point Arithmetic Optimised for FPGA Architectures

      • Iakovos Stamoulis, Martin White, Paul F. Lister

      Pages 365-370

This book contains the papers presented at the 9th International Workshop on Field ProgrammableLogic and Applications (FPL’99), hosted by the University of Strathclyde in Glasgow, Scotland, August 30 – September 1, 1999. FPL’99 is the ninth in the series of annual FPL workshops. The FPL’99 programme committee has been fortunate to have received a large number of high-quality papers addressing a wide range of topics. From these, 33 papers have been selected for presentation at the workshop and a further 32 papers have been accepted for the poster sessions. A total of 65 papers from 20 countries are included in this volume. FPL is a subject area that attracts researchers from both electronic engine- ing and computer science. Whether we are engaged in research into soft ha- ware or hard software seems to be primarily a question of perspective. What is unquestionable is that the interaction of groups of researchers from di?erent backgrounds results in stimulating and productive research. As we prepare for the new millennium, the premier European forum for - searchers in ?eld programmable logic remains the FPL workshop. Next year the FPL series of workshopswill celebrate its tenth anniversary.The contribution of so many overseas researchers has been a particularly attractive feature of these events, giving them a truly international perspective, while the informal and convivial atmosphere that pervades the workshops have been their hallmark. We look forward to preserving these features in the future while continuing to expand the size and quality of the events.

• Computer-Aided Design (CAD)
• Erfüllbarkeitsproblem der Aussagenlogik
• FPGA Design
• Simulation
• algorithms
• automata
• field-programmable gate arrays
• hardware/software codedesign
• logic
• logic devices
• optimization
• processor
• reconfigurable computer systems
• reconfigurable computing
• rendering
• complexity

• Xilinx Research Labs, San Jose

  Patrick Lysaght

• Department of Electrical and Electronic Engineering, University of Strathclyde, Glasgow, UK

  James Irvine

• Technical University of Kaiserslautern, Germany

  Reiner Hartenstein

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