Nano, Quantum and Molecular Computing

Implications to High Level Design and Validation

  • Sandeep K. Shukla
  • R. Iris Bahar

Table of contents

  1. Front Matter
    Pages i-xvii
  2. Nano-Computing at the Physical Layer

    1. Arijit Raychowdhury, Kaushik Roy
      Pages 5-33
  3. Defect Tolerant Nano-Computing

    1. Mahim Mishra, Seth C. Goldstein
      Pages 73-108
    2. R. Iris Bahar, Jie Chen, Joseph Mundy
      Pages 133-156
    3. André DeHon
      Pages 213-241
  4. Nano-scale Quantum Computing

    1. Diana Franklin, Frederic T. Chong
      Pages 247-266
    2. Michael T. Niemier, Peter M. Kogge
      Pages 267-293
    3. Sung Kyu Lim, Mike Niemier
      Pages 295-317
  5. Validation of Nano-Scale Architectures

    1. Michael S. Hsiao, Shuo Sheng, Rajat Arora, Ankur Jain, Vamsi Boppana
      Pages 323-351
  6. Back Matter
    Pages 352-358

About this book


One of the grand challenges in the nano-scopic computing era is guarantees of robustness. Robust computing system design is confronted with quantum physical, probabilistic, and even biological phenomena, and guaranteeing high reliability is much more difficult than ever before. Scaling devices down to the level of single electron operation will bring forth new challenges due to probabilistic effects and uncertainty in guaranteeing 'zero-one' based computing. Minuscule devices imply billions of devices on a single chip, which may help mitigate the challenge of uncertainty by replication and redundancy. However, such device densities will create a design and validation nightmare with the shear scale.
The questions that confront computer engineers regarding the current status of nanocomputing material and the reliability of systems built from such miniscule devices, are difficult to articulate and answer. We have found a lack of resources in the confines of a single volume that at least partially attempts to answer these questions.
We believe that this volume contains a large amount of research material as well as new ideas that will be very useful for some one starting research in the arena of nanocomputing, not at the device level, but the problems one would face at system level design and validation when nanoscopic physicality will be present at the device level.


Hardware architecture computer logic material nano-scale quantum computing transistor

Editors and affiliations

  • Sandeep K. Shukla
    • 1
  • R. Iris Bahar
    • 2
  1. 1.Virginia Polytechnic and State UniversityBlacksburgUSA
  2. 2.Brown UniversityProvidenceUSA

Bibliographic information

  • DOI
  • Copyright Information Springer Science + Business Media, Inc. 2004
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4020-8067-8
  • Online ISBN 978-1-4020-8068-5
  • Buy this book on publisher's site
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