Substrate Noise Coupling in Mixed-Signal ASICs

  • Stéphane Donnay
  • Georges Gielen

Table of contents

  1. Front Matter
    Pages i-xxxi
  2. Francois J. R. Clément
    Pages 1-21
  3. Stéphane Donnay, Marc van Heijningen, Mustafa Badaroglu
    Pages 23-45
  4. Nishath Verghese, Wen Kung Chu, Jim McCanny
    Pages 47-63
  5. N. P. van der Meijs
    Pages 65-92
  6. Valentino Liberali
    Pages 93-112
  7. Mustafa Badaroglu, Marc van Heijningen, Stéphane Donnay
    Pages 113-133
  8. Yann Zinzius, Georges Gielen, Willy Sansen
    Pages 135-160
  9. Maher Kayal, Richard Lara Saez, Marc Pastre
    Pages 209-232
  10. Mustafa Badaroglu, Stéphane Donnay
    Pages 233-255
  11. Domine M. W. Leenaerts
    Pages 271-287

About this book

Introduction

This book is the first in a series of three dedicated to advanced topics in Mixed-Signal IC design methodologies. It is one of the results achieved by the Mixed-Signal Design Cluster, an initiative launched in 1998 as part of the TARDIS project, funded by the European Commission within the ESPRIT-IV Framework. This initiative aims to promote the development of new design and test methodologies for Mixed-Signal ICs, and to accelerate their adoption by industrial users. As Microelectronics evolves, Mixed-Signal techniques are gaining a significant importance due to the wide spread of applications where an analog front-end is needed to drive a complex digital-processing subsystem. In this sense, Analog and Mixed-Signal circuits are recognized as a bottleneck for the market acceptance of Systems-On-Chip, because of the inherent difficulties involved in the design and test of these circuits. Specially, problems arising from the use of a common substrate for analog and digital components are a main limiting factor. The Mixed-Signal Cluster has been formed by a group of 11 Research and Development projects, plus a specific action to promote the dissemination of design methodologies, techniques, and supporting tools developed within the Cluster projects. The whole action, ending in July 2002, has been assigned an overall budget of more than 8 million EURO.

Keywords

ASIC CMOS SoC Transistor communication filter finite element method layout metal-oxide-semiconductor transistor modeling multimedia simulation static-induction transistor system on chip (SoC) telecommunications

Editors and affiliations

  • Stéphane Donnay
    • 1
  • Georges Gielen
    • 2
  1. 1.IMECLeuvenBelgium
  2. 2.Katholieke UniversiteitLeuvenBelgium

Bibliographic information

  • DOI https://doi.org/10.1007/b105382
  • Copyright Information Kluwer Academic Publishers 2003
  • Publisher Name Springer, Boston, MA
  • eBook Packages Springer Book Archive
  • Print ISBN 978-1-4020-7381-6
  • Online ISBN 978-0-306-48170-3
  • About this book
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