© 2005

Power-Aware Computer Systems

Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003 Revised Papers

  • Babak Falsafi
  • T. N. VijayKumar
Conference proceedings PACS 2003

Part of the Lecture Notes in Computer Science book series (LNCS, volume 3164)

Table of contents

  1. Front Matter
  2. Compilers

    1. Yao Guo, Saurabh Chheda, Csaba Andras Moritz
      Pages 1-12
    2. Jerry Hom, Ulrich Kremer
      Pages 13-25
  3. Embedded Systems

    1. Manish Verma, Lars Wehmeyer, Peter Marwedel
      Pages 41-56
    2. Ye Wen, Rich Wolski, Chandra Krintz
      Pages 57-72
    3. John Oliver, Ravishankar Rao, Paul Sultana, Jedidiah Crandall, Erik Czernikowski, Leslie W. Jones IV et al.
      Pages 73-85
    4. Wajahat Qadeer, Tajana Simunic Rosing, John Ankcorn, Venky Krishnan, Givanni De Micheli
      Pages 86-100
  4. Microarchitectural Techniques

  5. Cache and Memory Systems

    1. Xiaobo Fan, Carla S. Ellis, Alvin R. Lebeck
      Pages 164-179
    2. Rajeev Balasubramonian, Viji Srinivasan, Sandhya Dwarkadas, Alper Buyuktosunoglu
      Pages 180-195
    3. Roni Rosner, Yoav Almog, Micha Moffie, Naftali Schwartz, Avi Mendelson
      Pages 196-214
  6. Back Matter

About these proceedings


Welcome to the proceedings of the 3rd Power-Aware Computer Systems (PACS 2003) Workshop held in conjunction with the 36th Annual International Symposium on Microarchitecture (MICRO-36). The increase in power and - ergy dissipation in computer systems has begun to limit performance and has also resulted in higher cost and lower reliability. The increase also implies - ducedbatterylifeinportablesystems.Becauseofthemagnitudeoftheproblem, alllevelsofcomputersystems,includingcircuits,architectures,andsoftware,are being employed to address power and energy issues. PACS 2003 was the third workshop in its series to explore power- and energy-awareness at all levels of computer systems and brought together experts from academia and industry. These proceedings include 14 research papers, selected from 43 submissions, spanningawidespectrumofareasinpower-awaresystems.Wehavegrouped the papers into the following categories: (1) compilers, (2) embedded systems, (3) microarchitectures, and (4) cache and memory systems. The ?rst paper on compiler techniques proposes pointer reuse analysis that is biased by runtime information (i.e., the targets of pointers are determined based on the likelihood of their occurrence at runtime) to map accesses to ener- e?cient memory access paths (e.g., avoid tag match). Another paper proposes compiling multiple programs together so that disk accesses across the programs can be synchronized to achieve longer sleep times in disks than if the programs are optimized separately.


Embedded System circuit design compiler computer embedded systems energy dissipation hardware design low power consumption performance analysis power optimization power-aware computer systems power-aware computing power-aware memory systems processor design

Editors and affiliations

  • Babak Falsafi
    • 1
  • T. N. VijayKumar
    • 2
  1. 1.Electrical and Computer Engineering, Computer ScienceCarnegie Mellon UniversityPittsburghUSA
  2. 2.ECEPurdue UniversityUSA

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