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© 2013

Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures

Book

Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 184)

Table of contents

  1. Front Matter
    Pages i-xiv
  2. Umit Y. Ogras, Radu Marculescu
    Pages 1-8
  3. Umit Y. Ogras, Radu Marculescu
    Pages 9-32
  4. Umit Y. Ogras, Radu Marculescu
    Pages 33-37
  5. Umit Y. Ogras, Radu Marculescu
    Pages 39-47
  6. Umit Y. Ogras, Radu Marculescu
    Pages 49-74
  7. Umit Y. Ogras, Radu Marculescu
    Pages 135-154
  8. Umit Y. Ogras, Radu Marculescu
    Pages 155-155
  9. Back Matter
    Pages 157-174

About this book

Introduction

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.

This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

Keywords

Analysis Communication Architectures Modeling Network-on-Chip Optimization

Authors and affiliations

  1. 1.Intel CorporationHillsboro, ORUSA
  2. 2.Dept. Electrical & Computer EngineeringCarnegie Mellon UniversityPittsburghUSA

Bibliographic information

  • Book Title Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
  • Authors Umit Y. Ogras
    Radu Marculescu
  • Series Title Lecture Notes in Electrical Engineering
  • Series Abbreviated Title Lect. Notes Electrical Eng.
  • DOI https://doi.org/10.1007/978-94-007-3958-1
  • Copyright Information Springer Science+Business Media New York 2013
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering Engineering (R0)
  • Hardcover ISBN 978-94-007-3957-4
  • Softcover ISBN 978-94-007-9865-6
  • eBook ISBN 978-94-007-3958-1
  • Series ISSN 1876-1100
  • Series E-ISSN 1876-1119
  • Edition Number 1
  • Number of Pages XIV, 174
  • Number of Illustrations 0 b/w illustrations, 0 illustrations in colour
  • Topics Circuits and Systems
    Processor Architectures
  • Buy this book on publisher's site
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