Advertisement

© 2009

Novel Algorithms for Fast Statistical Analysis of Scaled Circuits

  • Authors

Benefits

  • Presents flexible and general techniques for statistical analysis that can be applied to wide variety of circuit applications

  • Applies theory from a wide variety of scientific fields (machine learning, computational finance, number theory, actuarial studies)

  • Covers relevant theory in detail

  • This is the first book to present these novel techniques

  • Extensive experiments, illustrative examples and analysis

Book

Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 46)

Table of contents

  1. Front Matter
    Pages i-xv
  2. Amith Singhee, Rob A. Rutenbar
    Pages 1-57
  3. Amith Singhee, Rob A. Rutenbar
    Pages 59-122
  4. Amith Singhee, Rob A. Rutenbar
    Pages 123-169
  5. Amith Singhee, Rob A. Rutenbar
    Pages 171-173
  6. Back Matter
    Pages 175-195

About this book

Introduction

As VLSI technology moves to the nanometer scale for transistor feature sizes, the impact of manufacturing imperfections result in large variations in the circuit performance. Traditional CAD tools are not well-equipped to handle this scenario, since they do not model this statistical nature of the circuit parameters and performances, or if they do, the existing techniques tend to be over-simplified or intractably slow. Novel Algorithms for Fast Statistical Analysis of Scaled Circuits draws upon ideas for attacking parallel problems in other technical fields, such as computational finance, machine learning and actuarial risk, and synthesizes them with innovative attacks for the problem domain of integrated circuits. The result is a set of novel solutions to problems of efficient statistical analysis of circuits in the nanometer regime. In particular, Novel Algorithms for Fast Statistical Analysis of Scaled Circuits makes three contributions:

1) SiLVR, a nonlinear response surface modeling and performance-driven dimensionality reduction strategy, that automatically captures the designer’s insight into the circuit behavior, by extracting quantitative measures of relative global sensitivities and nonlinear correlation.

2) Fast Monte Carlo simulation of circuits using quasi-Monte Carlo, showing speedups of 2× to 50× over standard Monte Carlo.

3) Statistical blockade, an efficient method for sampling rare events and estimating their probability distribution using limit results from extreme value theory, applied to high replication circuits like SRAM cells.

Keywords

Monte Carlo Scaled Circuits Statistical Analysis VLSI VLSI circuits algorithms derivation extreme value modeling simulation

Bibliographic information

  • Book Title Novel Algorithms for Fast Statistical Analysis of Scaled Circuits
  • Authors Amith Singhee
    Rob A. Rutenbar
  • Series Title Lecture Notes in Electrical Engineering
  • DOI https://doi.org/10.1007/978-90-481-3100-6
  • Copyright Information Springer Netherlands 2009
  • Publisher Name Springer, Dordrecht
  • eBook Packages Engineering Engineering (R0)
  • Hardcover ISBN 978-90-481-3099-3
  • Softcover ISBN 978-94-007-3687-0
  • eBook ISBN 978-90-481-3100-6
  • Series ISSN 1876-1100
  • Series E-ISSN 1876-1119
  • Edition Number 1
  • Number of Pages XV, 195
  • Number of Illustrations 0 b/w illustrations, 0 illustrations in colour
  • Topics Circuits and Systems
    Data Structures
    System Performance and Evaluation
  • Buy this book on publisher's site
Industry Sectors
Automotive
Biotechnology
Electronics
IT & Software
Telecommunications
Energy, Utilities & Environment
Aerospace
Oil, Gas & Geosciences
Engineering

Reviews

The Statistical Blockade method proposed by Singhee and Rutenbar will make a significant impact on the design of next-generation digital integrated circuits. It has the potential to dramatically reduce simulation time compared to a traditional Monte Carlo approach. Their award winning work is well received by industry and has influenced research directions in academia.
- Prof. Anantha Chandrakasan, MIT