Fundamentals of Bias Temperature Instability in MOS Transistors

Characterization Methods, Process and Materials Impact, DC and AC Modeling

  • Souvik Mahapatra

Part of the Springer Series in Advanced Microelectronics book series (MICROELECTR., volume 52)

Table of contents

  1. Front Matter
    Pages i-xvi
  2. Souvik Mahapatra, Nilesh Goel, Subhadeep Mukhopadhyay
    Pages 1-42
  3. Souvik Mahapatra, Nilesh Goel, Ankush Chaudhary, Kaustubh Joshi, Subhadeep Mukhopadhyay
    Pages 43-92
  4. Souvik Mahapatra, Kaustubh Joshi, Subhadeep Mukhopadhyay, Ankush Chaudhary, Nilesh Goel
    Pages 127-179
  5. Ahmad Ehteshamul Islam, Nilesh Goel, Souvik Mahapatra, Muhammad Ashraful Alam
    Pages 181-207
  6. Back Matter
    Pages 265-269

About this book


This book aims to cover different aspects of Bias Temperature Instability (BTI). BTI remains as an important reliability concern for CMOS transistors and circuits. Development of BTI resilient technology relies on utilizing artefact-free stress and measurement methods and suitable physics-based models for accurate determination of degradation at end-of-life, and understanding the gate insulator process impact on BTI. This book discusses different ultra-fast characterization techniques for recovery artefact free BTI measurements. It also covers different direct measurements techniques to access pre-existing and newly generated gate insulator traps responsible for BTI. The book provides a consistent physical framework for NBTI and PBTI respectively for p- and n- channel MOSFETs, consisting of trap generation and trapping. A physics-based compact model is presented to estimate measured BTI degradation in planar Si MOSFETs having differently processed SiON and HKMG gate insulators, in planar SiGe MOSFETs and also in Si FinFETs.  The contents also include a detailed investigation of the gate insulator process dependence of BTI in differently processed SiON and HKMG MOSFETs. The book then goes on to discuss Reaction-Diffusion (RD) model to estimate generation of new traps for DC and AC NBTI stress, and Transient Trap Occupancy Model (TTOM) to estimate charge occupancy of generated traps and their contribution to BTI degradation. Finally, a comprehensive NBTI modeling framework including TTOM enabled RD model and hole trapping to predict time evolution of BTI degradation and recovery during and after DC stress for different stress and recovery biases and temperature, during consecutive arbitrary stress and recovery cycles, and during AC stress at different frequency and duty cycle. The contents of this book should prove useful to academia and professionals alike.


AC Stress BTI BTI Degradation BTI Recovery BTI in MOSFETs Bias Temperature Instability Charge Pumping DC Stress DCIV End-of-life Projection Flicker Noise HKMG MOSFET NBTI PBTI Reaction-Diffusion Model SILC SiON Trap Occupancy and Trap Generation Trapping in MOSFET Devices

Editors and affiliations

  • Souvik Mahapatra
    • 1
  1. 1.IIT BombayMumbaiIndia

Bibliographic information

  • DOI
  • Copyright Information Springer India 2016
  • Publisher Name Springer, New Delhi
  • eBook Packages Engineering Engineering (R0)
  • Print ISBN 978-81-322-2507-2
  • Online ISBN 978-81-322-2508-9
  • Series Print ISSN 1437-0387
  • Series Online ISSN 2197-6643
  • Buy this book on publisher's site
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