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© 2015

A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel

  • Provides lucid description of the theoretical concepts

  • Discusses digital phase locked loop (DPLL) based on Zero Crossing (ZC) algorithm for carrier and symbol recovery in mobile communication

  • Explains a DPLL based design, which is based on Least Square Polynomial Fitting Filter (LSPFF)

Book

Part of the Signals and Communication Technology book series (SCT)

Table of contents

  1. Front Matter
    Pages i-xxi
  2. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 1-29
  3. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 31-47
  4. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 49-87
  5. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 89-101
  6. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 103-126
  7. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 127-151
  8. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 153-162
  9. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 163-172
  10. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 173-185
  11. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 187-195
  12. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 197-217
  13. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 219-231
  14. Basab Bijoy Purkayastha, Kandarpa Kumar Sarma
    Pages 233-242
  15. Back Matter
    Pages 243-244

About this book

Introduction

The book reports two approaches of implementation of the essential components of a Digital Phase Locked Loop based system for dealing with wireless channels showing Nakagami-m fading. It is mostly observed in mobile communication. In the first approach, the structure of a Digital phase locked loop (DPLL) based on Zero Crossing (ZC) algorithm is proposed. In a modified form, the structure of a DPLL based systems for dealing with Nakagami-m fading based on Least Square Polynomial Fitting Filter is proposed, which operates at moderate sampling frequencies. A sixth order Least Square Polynomial Fitting (LSPF) block and Roots Approximator (RA) for better phase-frequency detection has been implemented as a replacement of Phase Frequency Detector (PFD) and Loop Filter (LF) of a traditional DPLL, which has helped to attain optimum performance of DPLL. The results of simulation of the proposed DPLL with Nakagami-m fading and QPSK modulation is discussed in detail which shows that the proposed method provides better performance than existing systems of similar type.

Keywords

Digital Phase Locked Loop Least Square Polynomial Fitting Filter Loop Filter Nakagami-m Phase Frequency Detector Zero Crossing Algorithm

Authors and affiliations

  1. 1.Department of PhysicsIndian Institute of Technology GuwahatiGuwahatiIndia
  2. 2.Department of Electronics and Communication TechnologyGauhati UniversityGuwahatiIndia

About the authors

Mr. Basab Bijoy Purkayastha is currently working as Technical Superintendent in the Department of Physics, Indian Institute of Technology Guwahati, India. He has completed MSc in Electronics Science from Gauhati University, India in 2002. He also completed M.Tech from the same institution in 2012 with specialization in Mobile Communication and DPLL based Design. He has around 10 research papers published in international conference proceedings and journals.

Dr. Kandarpa Kumar Sarma, currently Associate Professor in Department of Electronics and Communication Technology, Gauhati University, Guwahati, Assam, India, has over seventeen years of professional experience. He has covered all areas of UG/PG level electronics courses including soft computing, mobile communication, digital signal and image processing. He obtained MTech degree in Signal Processing from Indian Institute of Technology Guwahati in 2005 and subsequently completed PhD programme in the area of Soft-Computational Application in Mobile Communication. He has authored seven books, several book chapters, around three hundred peer reviewed research papers in international conference proceedings and journals. His areas of interest are Soft-Computation and its Applications, Mobile Communication, Antenna Design, Speech Processing, Document Image Analysis and Signal Processing Applications in High Energy Physics, Neuro-computing and Computational Models for Social-Science Applications. He is senior member IEEE (USA), Fellow IETE (India), Member International Neural Network Society (INNS, USA), Life Member ISTE (India) and Life Member CSI (India). He serves as an Editor-in-Chief of International Journal of Intelligent System Design and Computing (IJISDC, UK), guest editor of several international journals, reviewer of over thirty international journals and over hundred international conferences.

Bibliographic information

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