Wireless Multimedia Sensor Networks on Reconfigurable Hardware

Information Reduction Techniques

  • Li-minn Ang
  • Kah Phooi Seng
  • Li Wern Chew
  • Lee Seng Yeong
  • Wai Chong Chia

Table of contents

  1. Front Matter
    Pages i-xxi
  2. Li-minn Ang, Kah Phooi Seng, Li Wern Chew, Lee Seng Yeong, Wai Chong Chia
    Pages 1-4
  3. Li-minn Ang, Kah Phooi Seng, Li Wern Chew, Lee Seng Yeong, Wai Chong Chia
    Pages 5-38
  4. Li-minn Ang, Kah Phooi Seng, Li Wern Chew, Lee Seng Yeong, Wai Chong Chia
    Pages 39-68
  5. Li-minn Ang, Kah Phooi Seng, Li Wern Chew, Lee Seng Yeong, Wai Chong Chia
    Pages 69-103
  6. Li-minn Ang, Kah Phooi Seng, Li Wern Chew, Lee Seng Yeong, Wai Chong Chia
    Pages 105-157
  7. Li-minn Ang, Kah Phooi Seng, Li Wern Chew, Lee Seng Yeong, Wai Chong Chia
    Pages 159-206
  8. Li-minn Ang, Kah Phooi Seng, Li Wern Chew, Lee Seng Yeong, Wai Chong Chia
    Pages 207-248
  9. Back Matter
    Pages 249-283

About this book

Introduction

Traditional wireless sensor networks (WSNs) capture scalar data such as temperature, vibration, pressure, or humidity. Motivated by the success of WSNs and also with the emergence of new technology in the form of low-cost image sensors, researchers have proposed combining image and audio sensors with WSNs to form wireless multimedia sensor networks (WMSNs). This introduces practical and research challenges, because multimedia sensors, particularly image sensors, generate huge amounts of data to be processed and distributed within the network, while sensor nodes have restricted battery power and hardware resources.

 

This book describes how reconfigurable hardware technologies such as field-programmable gate arrays (FPGAs) offer cost-effective, flexible platforms for implementing WMSNs, with a main focus on developing efficient algorithms and architectures for information reduction, including event detection, event compression, and multicamera processing for hardware implementations. The authors include a comprehensive review of wireless multimedia sensor networks, a complete specification of a very low-complexity, low-memory FPGA WMSN node processor, and several case studies that illustrate information reduction algorithms for visual event compression, detection, and fusion.

 

The book will be of interest to academic researchers, R&D engineers, and computer science and engineering graduate students engaged with signal and video processing, computer vision, embedded systems, and sensor networks.

Keywords

Field-programmable gate array (FPGA) Hardware architectures Information reduction Multimedia Reconfigurable hardware Sensor networks Visual information processing Wireless multimedia sensor networks

Authors and affiliations

  • Li-minn Ang
    • 1
  • Kah Phooi Seng
    • 2
  • Li Wern Chew
    • 3
  • Lee Seng Yeong
    • 4
  • Wai Chong Chia
    • 5
  1. 1.School of EngineeringEdith Cowan UniversityJoondalup, Western AustraliaAustralia
  2. 2.School of EngineeringEdith Cowan UniversityJoondalup, WesternAustralia
  3. 3.Intel Architecture GroupIntel CorporationPenangMalaysia
  4. 4.Dept. of Computer Science and Networked SystemsSunway UniversitySelangorMalaysia
  5. 5.Dept. of Computer Science and Networked SystemsSunway UniversitySelangorMalaysia

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-642-38203-1
  • Copyright Information Springer-Verlag Berlin Heidelberg 2013
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Computer Science
  • Print ISBN 978-3-642-38202-4
  • Online ISBN 978-3-642-38203-1
  • About this book
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