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© 2012

Low Power RF Circuit Design in Standard CMOS Technology

Book

Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 104)

Table of contents

  1. Front Matter
  2. Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 1-9
  3. Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 11-24
  4. Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 25-40
  5. Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 61-85
  6. Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 87-127
  7. Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 129-177
  8. Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 179-236

About this book

Introduction

Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for each terminal is limited by the relatively slow increase in battery performance expected in the near future, the need for efficient circuits is now critical. This book presents the basic techniques available to design low power RF CMOS analogue circuits. It gives circuit designers a complete guide of alternatives to optimize power consumption and explains the application of these rules in the most common RF building blocks: LNA, mixers and PLLs. It is set out using practical examples and offers a unique perspective as it targets designers working within the standard CMOS process and all the limitations inherent in these technologies.

Keywords

Low Power Consumption RF building blocks circuit techniques wireless communication

Authors and affiliations

  1. 1.CEIT and TECNUNUniversity of NavarraSan SebastiánSpain

Bibliographic information

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