About this book
This book presents a study on how thread and data mapping techniques can be used to improve the performance of multi-core architectures.
It describes how the memory hierarchy introduces non-uniform memory access, and how mapping can be used to reduce the memory access latency in current hardware architectures.
On the software side, this book describes the characteristics present in parallel applications that are used by mapping techniques to improve memory access.
Several state-of-the-art methods are analyzed, and the benefits and drawbacks of each one are identified.
Data Movement Thread Mapping Cache Memory Non-uniform memory access Data Mapping
- DOI https://doi.org/10.1007/978-3-319-91074-1
- Copyright Information The Author(s), under exclusive licence to Springer International Publishing AG, part of Springer Nature 2018
- Publisher Name Springer, Cham
- eBook Packages Computer Science
- Print ISBN 978-3-319-91073-4
- Online ISBN 978-3-319-91074-1
- Series Print ISSN 2191-5768
- Series Online ISSN 2191-5776
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