© 2017

Hardware Security and Trust

Design and Deployment of Integrated Circuits in a Threatened Environment

  • Nicolas Sklavos
  • Ricardo Chaves
  • Giorgio Di Natale
  • Francesco Regazzoni

Table of contents

  1. Front Matter
    Pages i-x
  2. João Carlos Resende, Ricardo Chaves
    Pages 1-25
  3. Roberta Piscitelli, Shivam Bhasin, Francesco Regazzoni
    Pages 27-47
  4. Louiza Papachristodoulou, Lejla Batina, Nele Mentens
    Pages 49-76
  5. Jiří Buček, Martin Novotný, Filip Štěpánek
    Pages 77-91
  6. Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu
    Pages 107-126
  7. Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Paul-Henri Pugliesi-Conti
    Pages 127-148
  8. Jelena Milosevic, Francesco Regazzoni, Miroslaw Malek
    Pages 149-167
  9. Paris Kitsos, Nicolas Sklavos, Artemios G. Voyiatzis
    Pages 169-187
  10. Mario Barbareschi
    Pages 189-209
  11. Linus Feiten, Matthias Sauer, Bernd Becker
    Pages 211-235
  12. Mario Barbareschi, Giorgio Di Natale, Lionel Torres
    Pages 237-251
  13. Back Matter
    Pages 253-254

About this book


This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth.  The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools.  Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers.

  • Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization;
  • Describes new methods and algorithms for the identification/detection of hardware trojans;
  • Defines new architectures capable of detecting faults and resisting fault attacks;
  • Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks.


Cryptographic Algorithms Cryptographic engineering Cryptographic logic Hardware Trojans Hardware security and trust Physically Unclonable Functions Secure integrated circuits True Random Number Generators

Editors and affiliations

  • Nicolas Sklavos
    • 1
  • Ricardo Chaves
    • 2
  • Giorgio Di Natale
    • 3
  • Francesco Regazzoni
    • 4
  1. 1.Computer & Informatics Engineering DepartmentTechnological Educational Institute of Western GreeceAntirrioGreece
  2. 2.INESC-ID, ISTUniversity of LisbonLisbonPortugal
  3. 3.UMR 5506 - CC 477LIRMM - CNRS / University of MontpellierMontpellierFrance
  4. 4.ALaRI InstituteUniversity of LuganoLuganoSwitzerland

About the editors

Nicolas Sklavos is an Associate Professor, with the Computer Engineering & Informatics Department, Polytechnic School, University of Patras, Hellas.

He holds an award for his PhD thesis on “VLSI Designs of Wireless Communications Security Systems”, from IFIP VLSI SOC, Germany, 2003. He has been awarded with a post-doctoral research scholarship, from the National Scholarship Foundation.

He has participated in a great number of European and National projects, with both research & management activities, funding by the European Commission or/and National resources.

He also acts as a reviewer and evaluator for both European Commission Project Calls, and National Project Calls of several countries.

He is Associate Editor of the Electrical & Computer Engineering Journal, Hindawi and Cryptography, ΜDPI Publisher. He was the Editor in Chief of Information Security Journal: a Global Perspective, Taylor Francis Group, from 2011 to 2014. He also served as Associate Editor of IEEE Transactions of Latin America, and Computers & Electrical Engineering Journal, Elsevier and Information Security Journal: a Global Perspective, Taylor Francis Group. He has been invited as Guest Editor of Special Issues of several publishers. He has been awarded as Top Associated Editor for 2010 and 2011, from Computers & Electrical Engineering Journal, Elsevier.

He is an IEEE, Senior Member. From 2007 to 2014, he was the Council’s Chair of IEEE Greece Young Professionals.

He is an Associated Member of European Network of Excellence (HiPEAC). He is a member of the IFIP Working Group 11.3 on Data and Application Security and Privacy. He is also a member of International Association for Cryptologic Research (IACR), the Technical Chamber of Greece, and the Greek Electrical Engineering Society.

He has participated in the committees of up to 300 conferences organized by IEEE, ACM, IFIP, as General, Program, Publication, etc, Chair, and with other roles.

He has also authored/co-authored up to 250 scientific articles, published in journals, conferences, both books, books chapters, tutorials and technical reports, in the areas of his research. He has been invited as keynote speaker to several international conferences, workshops, summer schools etc.

Recently, the results of his research, have received up to 1700 citations, in the scientific and technical literature.

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