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Verified Software: Theories, Tools, and Experiments

7th International Conference, VSTTE 2015, San Francisco, CA, USA, July 18–19, 2015. Revised Selected Papers

  • Arie Gurfinkel
  • Sanjit A. Seshia

Part of the Lecture Notes in Computer Science book series (LNCS, volume 9593)

Also part of the Programming and Software Engineering book sub series (LNPSE, volume 9593)

Table of contents

  1. Front Matter
    Pages I-IX
  2. Leonardo Alt, Grigory Fedyukovich, Antti E. J. Hyvärinen, Natasha Sharygina
    Pages 1-18
  3. Tewodros A. Beyene, Swarat Chaudhuri, Corneliu Popeea, Andrey Rybalchenko
    Pages 19-39
  4. Achim D. Brucker, Oto Havle, Yakoub Nemouchi, Burkhart Wolff
    Pages 40-60
  5. Felix Dörre, Vladimir Klebanov
    Pages 61-72
  6. Gidon Ernst, Jörg Pfähler, Gerhard Schellhorn, Wolfgang Reif
    Pages 73-93
  7. Martin Clochard, Jean-Christophe Filliâtre, Andrei Paskevich
    Pages 94-109
  8. Andreas Katis, Andrew Gacek, Michael W. Whalen
    Pages 110-123
  9. Jonas Oberhauser
    Pages 142-164
  10. Ali Sezgin, Serdar Tasiran
    Pages 165-182
  11. Jiaqi Tan, Hui Jun Tay, Rajeev Gandhi, Priya Narasimhan
    Pages 202-222
  12. Back Matter
    Pages 223-223

About these proceedings

Introduction

This volume constitutes the thoroughly refereed post-conference proceedings of the 7th International Conference on Verified Software: Theories, Tools and Experiments, VSTTE 2015, held in July 2015 in San Francisco, CA, USA.
The 12 revised full papers presented were carefully revised and selected from 25 submissions.
The goal of this conference is to advance the state of the art in the science and technology of software verification, through the interaction of theory development, tool evolution, and experimental validation and
large-scale verification efforts that involve collaboration, theory unification, tool integration, and formalized domain knowledge.      

Keywords

automated reasoning dynamic analysis programming logic software verification theorem proving assertion checking automated static analysis benchmarks higher-order logic Hoare logic logic and verification model checking program analysis program specification programming languages protocol testing and verification requirements modeling SAT solving specification languages static analysis

Editors and affiliations

  • Arie Gurfinkel
    • 1
  • Sanjit A. Seshia
    • 2
  1. 1.Software Engineering InstituteCarnegie Mellon UniversityPittsburghUSA
  2. 2.Department of Electrical Engineering and Computer ScienceUniversity of CaliforniaBerkeleyUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-319-29613-5
  • Copyright Information Springer International Publishing Switzerland 2016
  • Publisher Name Springer, Cham
  • eBook Packages Computer Science
  • Print ISBN 978-3-319-29612-8
  • Online ISBN 978-3-319-29613-5
  • Series Print ISSN 0302-9743
  • Series Online ISSN 1611-3349
  • Buy this book on publisher's site
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