Debugging Systems-on-Chip

Communication-centric and Abstraction-based Techniques

  • Bart Vermeulen
  • Kees Goossens

Part of the Embedded Systems book series (EMSY)

Table of contents

  1. Front Matter
    Pages i-xv
  2. Introduction

    1. Front Matter
      Pages 1-1
    2. Bart Vermeulen, Kees Goossens
      Pages 3-24
  3. The Complexity of Debugging System Chips

    1. Front Matter
      Pages 25-25
    2. Bart Vermeulen, Kees Goossens
      Pages 27-35
    3. Bart Vermeulen, Kees Goossens
      Pages 37-63
  4. The CSAR Debug Approach

    1. Front Matter
      Pages 65-65
    2. Bart Vermeulen, Kees Goossens
      Pages 67-86
    3. Bart Vermeulen, Kees Goossens
      Pages 87-137
    4. Bart Vermeulen, Kees Goossens
      Pages 139-155
    5. Bart Vermeulen, Kees Goossens
      Pages 157-187
  5. Case Studies

    1. Front Matter
      Pages 189-189
    2. Bart Vermeulen, Kees Goossens
      Pages 191-232
  6. Related Work, Conclusion, and Future Work

    1. Front Matter
      Pages 233-233
    2. Bart Vermeulen, Kees Goossens
      Pages 235-255
    3. Bart Vermeulen, Kees Goossens
      Pages 257-262
  7. Back Matter
    Pages 263-311

About this book


This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly.  Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors.  The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug flow to be used during the design of an SOC, and customizable off-chip debugger software. Coverage includes an evaluation of the efficiency and effectiveness of the CSAR approach and its supporting infrastructure, using six industrial SOCs and an illustrative, example SOC model.  The authors also quantify the hardware cost and design effort to support their approach.
• Describes trends in embedded system design that make the design of SOCs complex and error-prone;
• Analyzes four key requirements for debugging a modern, silicon SOC implementation and identifies nine factors that complicate meeting these debug requirements;
• Uses communication control for debugging SOCs, which can be used with most on-chip SOC communication protocols in use today;
• Uses communication control to (re)create a particular transaction order and demonstrates that this is helpful in the localization of errors in a SOC implementation;
• Demonstrates the necessity of extracting locally- and globally-consistent states during SOC debug and guarantees by design that they are so;
• Uses a fast and scalable event distribution interconnect, which connects on-chip monitors and protocol specific instruments);
• Evaluates benefits and costs of the CSAR approach using six industrial SOC designs and an example SOC model.


Debugging Systems-on-chip Design-for-debug Off-chip Debugger Software On-Chip Instrumentation On-chip Debug Architecture SOC Design, Verification, and Validation Why Programs Fail

Authors and affiliations

  • Bart Vermeulen
    • 1
  • Kees Goossens
    • 2
  1. 1.NXP SemiconductorsEindhovenThe Netherlands
  2. 2.Faculty of Electrical EngineeringEindhoven University of TechnologyEindhovenThe Netherlands

Bibliographic information

  • DOI
  • Copyright Information Springer International Publishing Switzerland 2014
  • Publisher Name Springer, Cham
  • eBook Packages Engineering
  • Print ISBN 978-3-319-06241-9
  • Online ISBN 978-3-319-06242-6
  • Series Print ISSN 2193-0155
  • Series Online ISSN 2193-0163
  • Buy this book on publisher's site
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