This book describes for readers a methodology for dynamic power estimation, using Transaction Level Modeling (TLM). The methodology exploits the existing tools for RTL simulation, design synthesis and SystemC prototyping to provide fast and accurate power estimation using Transaction Level Power Modeling (TLPM). Readers will benefit from this innovative way of evaluating power on a high level of abstraction, at an early stage of the product life cycle, decreasing the number of the expensive design iterations.
- Presents an innovative, easy to execute, way for evaluating power consumption on a high-level of abstraction;
- Introduces a practical methodology for modeling power consumption, using existing design flows;
- Transaction Level Modeling is used as a new trend in modeling and simulating large circuits.