Learning from VLSI Design Experience

  • Weng Fook Lee

Table of contents

  1. Front Matter
    Pages i-xxix
  2. Weng Fook Lee
    Pages 1-1
  3. Weng Fook Lee
    Pages 3-44
  4. Weng Fook Lee
    Pages 45-65
  5. Weng Fook Lee
    Pages 67-71
  6. Weng Fook Lee
    Pages 73-109
  7. Weng Fook Lee
    Pages 111-129
  8. Weng Fook Lee
    Pages 131-157
  9. Weng Fook Lee
    Pages 159-174
  10. Weng Fook Lee
    Pages 175-209
  11. Back Matter
    Pages 211-214

About this book


This book shares with readers practical design knowledge gained from the author’s 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds.

  • Addresses practical design issues and their workarounds;
  • Discusses issues such as CDC, crossing clock domain in shift, scan chains across power domain, timing optimization, standard cell library influence on synthesis, DFT, code coverage, state machine;
  • Provides readers with an RTL coding guideline, based on real experience.


VLSI Physical Design Automation CMOS VLSI Design VLSI Verification VLSI Testing Design For Test

Authors and affiliations

  • Weng Fook Lee
    • 1
  1. 1.Emerald SystemsBayan LepasMalaysia

Bibliographic information

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