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© 2019

Micro-Electrode-Dot-Array Digital Microfluidic Biochips

Design Automation, Optimization, and Test Techniques

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Table of contents

  1. Front Matter
    Pages i-xiii
  2. Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
    Pages 1-20
  3. Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
    Pages 21-51
  4. Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
    Pages 53-81
  5. Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
    Pages 83-112
  6. Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
    Pages 113-134
  7. Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
    Pages 135-141
  8. Back Matter
    Pages 143-144

About this book

Introduction

This book provides an insightful guide to the design, testing and optimization of micro-electrode-dot-array (MEDA) digital microfluidic biochips.  The authors focus on the characteristics specific for MEDA biochips, e.g., real-time sensing and advanced microfluidic operations like lamination mixing and droplet shape morphing. Readers will be enabled to enhance the automated design and use of MEDA and to develop a set of solutions to facilitate the full exploitation of design complexities that are possible with standard CMOS fabrication techniques. The book provides the first set of design automation and test techniques for MEDA biochips. The methods described in this book have been validated using fabricated MEDA biochips in the laboratory. Readers will benefit from an in-depth look at the MEDA platform and how to combine microfluidics with software, e.g., applying biomolecular protocols to software-controlled and cyberphysical microfluidic biochips.


  • Presents a method for droplet size-aware high-level synthesis, targeting reservoir placement, operation scheduling, module placement, and routing of droplets of various sizes in a MEDA biochip;
  • Enables efficient and adaptive error recovery, through a probabilistic-timed-automata (PTA)-based strategy for error recovery in MEDA biochips;
  • Includes structural and functional test methods for MEDA biochips;
  • Describes a droplet size-aware sample preparation method, referred to as the weighted sample-preparation method (WSPM), for MEDA biochips.

Keywords

Digital Microfluidic Biochips Microfluidic Very Large Scale Integration Fault-Tolerant Digital Microfluidic Biochips MEDA Digital Microfluidic Biochips MEDA biochip

Authors and affiliations

  1. 1.Intel (United States)Santa ClaraUSA
  2. 2.Department of ECEDuke UniversityDurhamUSA
  3. 3.National Tsing Hua UniversityHsinchuTaiwan
  4. 4.National Chiao Tung UniversityHsinchuTaiwan

About the authors

Zipeng Li received the bachelor’s degree in microelectronics from the Harbin Institute of Technology, Harbin, China, in 2013, and the master’s and Ph.D. degrees in computer engineering from Duke University, Durham, NC, USA, in 2015 and 2017, respectively. Dr. Li is currently a Senior DFT Engineer with Intel Corporation, Santa Clara, CA, USA. His current research interests include design automation for biochips, design-for-test, 2.5-D/3-D ICs, and mixed-technology microsystems.

 

Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now the William H. Younger Distinguished Professor and Department Chair of Electrical and Computer Engineering, and Professor of Computer Science, at Duke University. 

Prof. Chakrabarty is a recipient of the National Science Foundation CAREER award, the Office of Naval Research Young Investigator Award, the Humboldt Research Award from the Alexander von Humboldt Foundation, Germany, the IEEE Transactions on CAD Donald O. Pederson Best Paper Award (2015), the ACM Transactions on Design Automation of Electronic Systems Best Paper Award (2017), and over a dozen best paper awards at major conferences. He is also a recipient of the IEEE Computer Society Technical Achievement Award (2015), the IEEE Circuits and Systems Society Charles A. Desoer Technical Achievement Award (2017), the Semiconductor Research Corporation Technical Excellence Award (2018), and the Distinguished Alumnus Award from the Indian Institute of Technology, Kharagpur (2014). He is a Hans Fischer Senior Fellow at the Institute for Advanced Study, Technical University of Munich, Germany. He is a 2018 recipient of the Japan Society for the Promotion of Science (JSPS) Fellowship in the “Short Term S: Nobel Prize Level” category. 

Prof. Chakrabarty’s current research projects include: testing and design-for-testability of integrated circuits and systems; digital microfluidics, biochips, and cyberphysical systems; data analytics for fault diagnosis, failure prediction, anomaly detection, and hardware security; neuromorphic computing systems. He is a Fellow of ACM, a Fellow of IEEE, and a Golden Core Member of the IEEE Computer Society. 

 

Tsung-Yi Ho received the Ph.D. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 2005. He is a Professor with the Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan. His current research interests include design automation and test for microfluidic biochips and nanometer integrated circuits. He has presented 10 tutorials and contributed 11 special sessions in ACM/IEEE conferences, all in design automation for microfluidic biochips.

Prof. Ho was a recipient of the Invitational Fellowship of the Japan Society for the Promotion of Science, the Humboldt Research Fellowship by the Alexander von Humboldt Foundation, the Hans Fischer Fellow by the Institute of Advanced Study of the Technical University of Munich, the best paper awards at the VLSI Test Symposium in 2013, and the IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS in 2015. He is an Associate Editor of the ACM Journal on Emerging Technologies in Computing Systems, ACM Transactions on Design Automation of Electronic Systems, ACM Transactions on Embedded Computing Systems, the IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, and the IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS. He served as a Distinguished Visitor of the IEEE Computer Society for 2013 to 2015, the Chair of the IEEE Computer Society Tainan Chapter for 2013 to 2015, and the Chair of the ACM SIGDA Taiwan Chapter for 2014 to 2015. He currently serves as an ACM Distinguished Speaker, a Distinguished Lecturer of the IEEE Circuits and Systems Society, and the Technical Program Committees of major conferences, including DAC, International Conference on Computer-Aided Design, Design, Automation & Test in Europe Conference, Asia and South Pacific Design Automation Conference, International Symposium on Physical Design, and International Conference on Computer Design.

 

Chen-Yi Lee received the B.S. degree in electrical engineering from National Chiao Tung University (NCTU), Hsinchu, Taiwan, in 1982 and the M.S. and Ph.D. degrees in electrical engineering from Katholieke University Leuven, Leuven, Belgium, in 1986 and 1990, respectively. From 1986 to 1990, he was with IMEC/VSDM, Leuven, researching in the area of architecture syn- thesis for DSP. In 1991, he joined the Department of Electronics Engineering and from 2003 to 2006. From 2000 to 2003, he was the Director of National CHIP Implementation Center and the Co-Ordinator of Microelectronics Program of Engineering Division, National Security Council, Taipei, Taiwan. He was the Dean of office of research and development from 2007 to 2010, NCTU. He currently serves as the Co-Program Director of National Program of Intelligent Electronics and a Professor of the Department of Electronics Engineering, NCTU. His current research interests include very large scale integration (VLSI) algorithms and architectures for high- throughput DSP applications. He is also active in various aspects of micro sensing, low-power system-on-chip, and deep learning.

Prof. Lee was a recipient of the Outstanding Technology Licensing Award from National Science Council in 2007 and 2008, the Industry Contribution Award from Ministry of Economic Affairs, and the Outstanding Research Award from National Science Council in 2009. He served as the Program Committee Member of IEEE International Solid-State Circuits Conference in 2004–2006, Design, Automation & Test in Europe Conference TPC Member in 2006 and 2007, IEEE Asian Solid-State Circuits Conference TPC Member in 2006–2014, IEEE VLSI Symposium Committee Member in 2010–2014, IEEE Transactions on Circuits and Systems-II Associate Editor in 2010 and 2011, and the Past-Chair of Taipei Chapter of IEEE Circuits and Systems Society.

 


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