Routing Algorithms in Networks-on-Chip

  • Maurizio Palesi
  • Masoud Daneshtalab

Table of contents

  1. Front Matter
    Pages i-xiv
  2. Masoud Danashtalab, Maurizio Palesi
    Pages 1-18
  3. Performance Improvement

    1. Front Matter
      Pages 19-19
    2. Abbas Eslami Kiasari, Axel Jantsch, Zhonghai Lu
      Pages 21-39
    3. Ra’ed Al-Dujaily, Terrence Mak, Fei Xia, Alex Yakovlev, Maurizio Palesi
      Pages 41-68
    4. Binzhang Fu, Yinhe Han, Huawei Li, Xiaowei Li
      Pages 69-103
    5. Masoumeh Ebrahimi, Masoud Daneshtalab
      Pages 105-125
  4. Multicast Communication

    1. Front Matter
      Pages 127-127
    2. Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
      Pages 161-189
  5. Fault Tolerance and Reliability

    1. Front Matter
      Pages 191-191
    2. Reyhaneh Jabbarvand Behrouz, Mehdi Modarressi, Hamid Sarbazi-Azad
      Pages 193-210
  6. Power/Energy and Thermal Issues

    1. Front Matter
      Pages 239-239
    2. Chris Fallin, Greg Nazario, Xiangyao Yu, Kevin Chang, Rachata Ausavarungnirun, Onur Mutlu
      Pages 241-275
  7. Emerging Technologies

    1. Front Matter
      Pages 305-305
    2. Kun-Chih Chen, Chih-Hao Chao, Shu-Yen Lin, An-Yeu (Andy) Wu
      Pages 307-338
    3. Somayyeh Koohi, Shaahin Hessabi
      Pages 339-375
  8. Industrial Case Study

    1. Front Matter
      Pages 377-377
    2. Aniruddha S. Vaidya, Mani Azimi, Akhilesh Kumar
      Pages 379-410

About this book


This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.


·         Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems;

·         Describes routing algorithms for NoC architectures at all abstraction levels, from the algorithmic level to actual implementation;

·         Discusses the impact on NoC routing algorithms of key design objectives, such as power dissipation, energy consumption, thermal aspects, reliability, and performance.


Adaptive Routing in Network on Chip Network on Chip Network on Chip Routing Architecture On-Chip Communication Architecture Routing Algorithms for Intel 80-Core Chip Routing Algorithms for Manycore Chips Routing Algorithms for NXP Athereal Routing Algorithms for Network on Chip Routing Algorithms for ST Spidergon Routing Algorithms for TILERA 100-Core Chip

Editors and affiliations

  • Maurizio Palesi
    • 1
  • Masoud Daneshtalab
    • 2
  1. 1.Facoltà di IngegneriaUniversità degli Studi di Enna, 'Kore'EnnaItaly
  2. 2.Department of ITUniversity of TurkuTurkuFinland

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