Variation Tolerant On-Chip Interconnects

  • Ethiopia Enideg Nigussie

Part of the Analog Circuits and Signal Processing book series (ACSP)

Table of contents

  1. Front Matter
    Pages i-xi
  2. Ethiopia Enideg Nigussie
    Pages 1-10
  3. Ethiopia Enideg Nigussie
    Pages 11-23
  4. Ethiopia Enideg Nigussie
    Pages 25-34
  5. Ethiopia Enideg Nigussie
    Pages 35-69
  6. Ethiopia Enideg Nigussie
    Pages 71-91
  7. Ethiopia Enideg Nigussie
    Pages 93-117
  8. Ethiopia Enideg Nigussie
    Pages 119-125
  9. Ethiopia Enideg Nigussie
    Pages 127-156
  10. Back Matter
    Pages 157-170

About this book


This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems.

  • Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect;
  • Describes design techniques to mitigate problems caused by variation;
  • Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.












Analog Circuits and Signal Processing Energy efficient interconnect Interconnection networks Low Power Design Network on Chip On-chip communication On-chip interconnect Power Management Variation tolerant interconnect

Authors and affiliations

  • Ethiopia Enideg Nigussie
    • 1
  1. 1.University of TurkuTurkuFinland

Bibliographic information

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