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© 2011

The Simple Art of SoC Design

Closing the Gap between RTL and ESL

  • Provides an easily accessible guide that enables readers to write better, more verifiable code for complex SoCs

  • Describes techniques for successful SoC design, including simplifying RTL design, reducing complexity in control-dominated designs, reducing complexity in data path dominated designs, and simplifying interfaces

  • Discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages should develop to fill future needs

Book

Table of contents

  1. Front Matter
    Pages i-xvii
  2. Michael Keating
    Pages 1-13
  3. Michael Keating
    Pages 15-26
  4. Michael Keating
    Pages 47-54
  5. Michael Keating
    Pages 55-69
  6. Michael Keating
    Pages 71-87
  7. Michael Keating
    Pages 109-121
  8. Michael Keating
    Pages 123-137
  9. Michael Keating
    Pages 139-153
  10. Michael Keating
    Pages 155-170
  11. Michael Keating
    Pages 171-180
  12. Back Matter
    Pages 181-234

About this book

Introduction

This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow’s SoC designs.

* Provides an easily accessible guide that enables readers to write better, more verifiable code for complex SoCs;
* Describes techniques for successful SoC design, including simplifying RTL design, reducing complexity in control-dominated designs, reducing complexity in data path dominated designs, and simplifying interfaces;
* Discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages should develop to fill future needs.
 
Early praise for The Simple Art of SoC Design…

I have enjoyed reading and reviewing the draft material for this book as Mike has developed and refined the content. His clarity and insight, gained from working with a range of mutual customers and SOC designers, shines through.

Working in an industry where successful IP deployment is fundamental to product success, I found that this book addresses practically what the designer must focus on, from specification, partitioning and clean interfacing through implementation to verification.

Highly recommended whether you are newly starting out in SoC design, or you are an industry veteran weighed down with ever more complex system integration challenges.

David Flynn
Fellow, Research & Development, ARM Ltd
Part-Time Visiting Professor in Electronics and Computer Science, University of Southampton, UK

Keywords

Circuits and Systems Embedded Systems High-Level Synthesis System Level Verification System on Chip

Authors and affiliations

  1. 1.SynopsysPalo AltoUSA

About the authors

Mike Keating is a Synopsys Fellow. Over the last 12 years, he has been with Synopsys focusing on IP development methodology, hardware and software design quality and low power design. His current research focuses on high level design and the challenges of designing extremely complex systems. Mike received his BSEE and MSEE from Stanford University, and has over 25 years experience in ASIC and system design. He is co-author of the Reuse Methodology Manual and the Low Power Methodology Manual. In 2007, ISQED gave Mike the Quality Award for contributions to quality in electronic design.

Bibliographic information

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