Advertisement

Table of contents

  1. Front Matter
  2. M. Berry, W. Harrod, S. Lo, B. Philippe, K. Gallivan, W. Jalby et al.
    Pages 25-39
  3. Philip C. Treleaven
    Pages 40-47
  4. Chizuko Saito, Hideharu Amano, Tomohiro Kudoh, Hideo Aiso
    Pages 53-60
  5. K. -H. Brenner, A. W. Lohmann
    Pages 69-75
  6. K. K. Lau, X. Z. Qiao
    Pages 84-94
  7. R. R. Oldehoeft, D. C. Cann, S. J. Allan
    Pages 120-127
  8. Guoqing Zhang, Yueming Hu, Zhiliang Xie
    Pages 133-141
  9. J. Milde, T. Plückebaum, W. Ameling
    Pages 142-148
  10. Yves Robert, Denis Trystram
    Pages 149-156

About these proceedings

Keywords

Hardware Scheduling algorithms compiler complexity computer logic parallelism processor

Bibliographic information

  • Book Title CONPAR 86
  • Book Subtitle Conference on Algorithms and Hardware for Parallel Processing Aachen, September 17–19, 1986 Proceedings
  • Editors Wolfgang Händler
    Dieter Haupt
    Rolf Jelitsch
    Wilfried Juling
    Otto Lange
  • Series Title Lecture Notes in Computer Science
  • Series Abbreviated Title Lect Notes Comput Sci
  • DOI https://doi.org/10.1007/3-540-16811-7
  • Copyright Information Springer-Verlag Berlin Heidelberg 1986
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Springer Book Archive
  • Softcover ISBN 978-3-540-16811-9
  • eBook ISBN 978-3-540-44856-3
  • Series ISSN 0302-9743
  • Series E-ISSN 1611-3349
  • Edition Number 1
  • Number of Pages XII, 424
  • Number of Illustrations 0 b/w illustrations, 0 illustrations in colour
  • Topics Processor Architectures
    Arithmetic and Logic Structures
  • Buy this book on publisher's site
Industry Sectors
Electronics