Here we present CMOS compatible fabrication methods and the results of an experimental study of single-atom single-electron transistors made from silicon on insulator and based on various dopant atoms. Transistors with channels doped with arsenic (As), phosphorus (P), gold (Au) and potassium (K) atoms were fabricated and studied. Two methods for fabricating of experimental transistor structures are presented. The first method (As, P transistors) used a inhomogeneously doped in depth silicon layer and controlled reduction of the size of the transistor channel in several cycles of isotropic reactive-ion etching. The second method (Au and K transistors) used an undoped silicon layer and the subsequent implantation of dopant atoms into a preformed transistor channel. Dopant electron and hole levels of Au and K atoms in silicon are located near the middle of the silicon band gap, which provides a small effective size of the dopant charge center and, as a result, a high value of the charge energy and operating temperature of the transistor compared to the traditional dopants (P, As, Sb, B). The values of the charge energy of the Au and K transistors, which were estimated from the measurements (Ec ≥ 150 meV), are much higher than those of the As and P transistors (Ec < 30 meV). Important advantages of the proposed methods are: controlled implantation of various impurities and possibility to combine etching and implantation cycles during sample preparation.
single-electron transistor single-atom transistor Au dopant K dopant silicon-on-insulator nanobridge nanowire
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The equipment of the “Educational and Methodical Center of Lithography and Microscopy,” Moscow State University, was used. We are very grateful to S. Bauerdick, P. Mazarov, A. Nadzeyka, and A. Rudzinski (Raith GmbH) and V. Vlasenko (OPTEC LLC) for providing the unique ionLINE system for ion implantation.