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Evaluation of novel carrier substrates for high reliability and integrated GaN devices in a 200 mm complementary metal-oxide semiconductor compatible process

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Abstract

In this paper new materials and substrate approaches are discussed which have potential to provide (Al)GaN buffers with a better crystal quality, higher critical electrical field, or thickness and have the potential to offer co-integration of GaN switches at different reference potentials, while maintaining lower wafer bow and maintaining complementary metal-oxide semiconductor (CMOS) compatibility. Engineered silicon substrates, silicon on insulator (SOI) and coefficient of thermal expansion (CTE)-matched substrates have been investigated and benchmarked with respect to each other. SOI and CTE-matched offer benefits for scaling to higher voltage, while a trench isolation process combined with an oxide interlayer substrate allows co-integration of GaN components in a GaN-integrated circuit (IC).

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References

  1. N.E. Posthuma, S. You, S. Stoffels, D. Wellekens, H. Liang, M. Zhao, and S. Decoutere: Gate architecture design for enhancement mode p-GaN gate HEMTs for 200 and 650 V applications. The 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Chicago (USA), pp. 188–191 (2018).

    Google Scholar 

  2. N.E. Posthuma, S. You, S. Stoffels, D. Wellekens, H. Liang, M. Zhao, B. De Jaeger, K. Geens, N. Ronchi, S. Decoutere, P. Moens, A. Banerjee, H. Ziad, and M. Tack: An Industry-Ready 200 mm p-GaN E-mode GaN-on-Si power Technology. The 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Chicago (USA), pp. 284–287 (2018).

    Google Scholar 

  3. S. Stoffels, B. Bakeroot, T.L Wu, D. Marcon, N.E. Posthuma, S. Decoutere, A.N. Tallarico, and C. Fiegna: Failure mode for p-GaN gates under forward gate stress with varying Mg concentration. 2017 IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, pp. 4B–4.1–4B–4.9 (2017).

    Google Scholar 

  4. I. Rossetto, M. Meneghini, E. Canato, M. Barbato, S. Stoffels, N.E. Posthuma, S. Decoutere, A.N. Tallarico, G. Meneghesso, and E. Zanoni: Field- and current-driven degradation of GaN-based power HEMTs with p-GaN gate: dependence on Mg-doping level. Microelectron. Reliabil. 76-77, 298–303 (2017).

    Article  Google Scholar 

  5. T. Kachi: Recent progress of GaN power devices for automotive applications. Jpn. J. Appl. Phys. 53, 100210 (2014).

    Article  Google Scholar 

  6. Steve O: Engineered substrates to enable high-volume manufacturing for GaN devices, Power Electronics News (2018), available at https://www.powerelectronicsnews.com/technology/engineered-substrates-to-enable-high-volume-manufacturing-for-gan-devices (accessed July 26, 2018).

    Google Scholar 

  7. S. Stoffels, K. Geens, M. Zhao, H. Liang, X. Li, M. Van Hove, and S. Decoutere: Next generation 200 mm substrates for GaN power devices. WOCSDICE, Las Palmas (Spain), pp. 95–96 (2017).

    Google Scholar 

  8. K. Geens, M. Van Hove, X. Li, M. Zhao, A. Šatka, A. Vincze, and S. Decoutere: CMOS Process-Compatible 200 mm polycrystalline AlN Substrates for GaN Power Transistors. WOCSDICE, Las Palmas (Spain), pp. 97–98 (2017).

    Google Scholar 

  9. N.E. Posthuma, S. You, H. Liang, N. Ronchi, X. Kang, D. Wellekens, Y.N. Sarapalli, and S. Decoutere: Impact of Mg out-diffusion and activation on the p-GaN gate HEMT device performance, Proceedings ISPSD, Prague (Czech Republic), pp. 95–98 (2016).

    Google Scholar 

  10. S. Stoffels, M. Zhao, R. Venegas, P. Kandaswamy, S. You, T. Novak, Y. Saripalli, M. Van Hove, and S. Decoutere: The physical mechanism of dispersion caused by AlGaN/GaN buffers on Si and optimization for low dispersion, IEEE International Electron Devices Meeting (IEDM), Washington DC (USA), pp. 35.4.1–35.4.4. (2015).

  11. H. Kamata, Y. Ishii, T. Mabuchi, K. Naoe, S. Ajimura, and K. Sanada: Single crystal growth of aluminum nitride. Fujikura Tech. Rev. 38, 41 (2009).

    Google Scholar 

  12. M. Borga, M. Meneghini, I. Rossetto, S. Stoffels, N. Posthuma, M. Van Hove, D. Marcon, S. Decoutere, G. Meneghesso, and E. Zanoni: Evidence of time-dependent vertical breakdown in GaN-on-Si HEMTs. IEEE Trans. Electron Devices 64, 3616–3621 (2017).

    Article  CAS  Google Scholar 

  13. D. Marcon, J. Viaene, P. Favia, H. Bender, X. Kang, S. Lenci, S. Stoffels, and S. Decoutere: Reliability of AlGaN/GaN HEMTs: Permanent leakage current increase and output current drop. In Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Suzhou (China), pp. 249–254 (2013).

    Google Scholar 

  14. D. Christy, T. Egawa, Y. Yano, H. Tokunaga, H. Shimamura, Y. Yamaoka, A. Ubukata, T. Tabuchi, and K. Matsumoto: Uniform growth of AlGaN/GaN high electron mobility transistors on 200 mm silicon (111) substrate. Appl. Phys. Express 6, 026501–1/4 (2013).

    Article  Google Scholar 

  15. J. Freedsman, T. Egawa, Y. Yamaoka, Y. Yano, A. Ubukata, T. Tabuchi, and K. Matsumoto: Normally off Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistor on 8 in. Si with low leakage current and high breakdown voltage (825 V). Appl. Phys. Express 7, 041003-1/3 (2014).

  16. R. Chu, A. Corrion, M. Chen, R. Li, D. Wong, D. Zhender, B. Hughes, and K. Boutros: 1200-V normally off GaN-on-Si field-effect transistors with low dynamic ON-resistance. IEEE Electron Device Lett. 32, 632–634 (2011).

    Article  CAS  Google Scholar 

  17. K.S. Boutros, S. Burnham, K. Shinohara, B. Hughes, D. Zehnder, and C. McGuire: Normally-off 5A/1100 V GaN-on-silicon device for high voltage applications. IEEE International Electron Devices Meeting (IEDM), Baltimore, MD (USA), pp. 7.5.1-7.5.3 (2009).

    Google Scholar 

  18. X. Li, M. Van Hove, M. Zhao, B. Bakeroot, S. You, G. Groeseneken, and S. Decoutere: Investigation on carrier transport through AlN nucleation layer from differently doped Si(111) substrates. IEEE Trans. Electron Devices 65, 1721–1727 (2018).

    Article  CAS  Google Scholar 

  19. M. Borga, M. Meneghini, S. Stoffels, X. Li, N. Posthuma, M. Van Hove, S. Decoutere, G. Meneghesso, and E. Zanoni: Impact of substrate resistivity on the vertical leakage, breakdown and trapping in GaN-on-Si E-mode HEMTs. IEEE Trans. Electron Devices 65, 2765–2770 (2018).

    Article  CAS  Google Scholar 

  20. D. Marcon, Y.N. Saripalli, and S. Decoutere: 200 mm GaN-on-Si epitaxy and e-mode device technology. IEEE International Electron Devices Meeting (IEDM), Washington, DC (USA), pp. 16.2.1–16.2.4 (2015).

    Chapter  Google Scholar 

  21. J.H. Leach, K. Udwary, P. Quayle, V. Odnoblyudov, C. Basceri, O. Aktas, H. Splawn, and K.R. Evans: Towards manufacturing large area GaN substrates from QST® seeds, CS MANTECH, Austin, TX (USA), 14.17 (2018).

  22. S. Stoffels, K. Geens, N.E. Poshtuma, M. Zhao, H. Liang, X. Li, D. Wellekens, S. You, B. Bakeroot, M. Van Hove, and S. Decoutere: GaN device architectures enabled by next generation substrates, GaN Marathon 2.0, Padova (Italy), pp. 27–28 (2018).

    Google Scholar 

  23. R.A. Khadar, C. Liu, L. Zhang, P. Xiang, K. Cheng, and E. Matioli: 820-V GaN-on-Si quasi-vertical p-i-n diodes with BFOM of 2.0 GW/cm2. IEEE Electron Device Lett. 39, 401–404 (2018).

    Article  Google Scholar 

  24. Y. Zhang, D. Piedra, M. Sun, J. Hennig, A. Dadgar, L. Yu, and T. Palacios: High-performance 500 V quasi- and fully-vertical GaN-on-Si pn diodes. IEEE Electron Device Lett. 38, 248–251 (2017).

    Article  CAS  Google Scholar 

  25. M. Zhu, B. Song, M. Qi, Z. Hu, K. Nomoto, X. Yan, Y. Cao, W. Johnson, E. Kohn, D. Jena, and H.G. Xing: 1.9-kV AlGaN/GaN lateral Schottky barrier diodes on silicon. IEEE Electron Device Lett. 36, 375–377 (2015).

    Article  Google Scholar 

  26. X. Li, M. Van Hove, M. Zhao, K. Geens, V.-P. Lempinen, J. Sormunen, G. Groeseneken, and S. Decoutere: 200 V enhancement-mode p-GaN HEMTs fabricated on 200 mm GaN-on-SOI with trench isolation for monolithic integration, IEEE Electron Device Lett. 38, 918 (2017).

    Article  CAS  Google Scholar 

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Acknowledgments

Part of this work has been performed under collaboration between imec, QROMIS (Santa Clara, California, USA), and Aixtron (Aachen, Germany).

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Correspondence to S. Stoffels.

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Stoffels, S., Geens, K., Li, X. et al. Evaluation of novel carrier substrates for high reliability and integrated GaN devices in a 200 mm complementary metal-oxide semiconductor compatible process. MRS Communications 8, 1387–1394 (2018). https://doi.org/10.1557/mrc.2018.192

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  • DOI: https://doi.org/10.1557/mrc.2018.192

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