Strained Silicon on Insulator wafers made by the Smart Cut™ technology

Abstract

Strained Silicon On Insulator wafers are today envisioned as a natural and powerful enhancement to standard SOI and/or bulk-like strained Si layers. For MOSFETs applications, this new technology potentially combines enhanced devices scalability allowed by thin films and enhanced electron and hole mobility in strained silicon. This paper is intended to demonstrate by experimental results how a layer transfer technique such as the Smart Cut™ technology can be used to obtain good quality tensile Strained Silicon On insulator wafers. Detailed experiments and characterizations will be used to characterize these engineered substrates and show that they are compatible with the applications.

This is a preview of subscription content, access via your institution.

References

  1. 1.

    B. Ghyselen, C. Aulnette, B. Osternaud, T. Akatsu, C. Mazure, C. Lagahe-Blanchard, S. Pocas, J.-M. Hartmann, P. Leduc, T. Ernst, H. Moriceau, Y. Campidelli, O. Kermarrec, P. Besson, Y. Morand, M. Rivoire, D. Bensahel and V. Paillard, Proc. 3rd International Conference on SiGe(C) Epitaxy and heterostructures, Santa Fe, 9-12th March 2003.

    Google Scholar 

  2. 2.

    L.J. Huang, J.O. Chu, D.F. Canaperi, C.P. D’Emic, R.M. Anderson, S.J. Koester and H.-S. Philip Wong, Appl. Phys. Lett. 78, 1267 (2001).

    CAS  Article  Google Scholar 

  3. 3.

    T. Tezuka, N. Sugiyama and S. Takagi, Appl. Phys. Lett. Vol. 79, 1798 (2001).

    CAS  Article  Google Scholar 

  4. 4.

    S. Takagi, T. Mizuno, T. Tezuka, N. Sugiyama, T. Numata, K. Usada, Y. Moriyama, S. Nakaharai, J. Koga, A. Tanabe, N. Hirashita and T. Maeda, Proc. IEDM 2003 Conf. p. 57.

  5. 5.

    K. Rim, K. Chan, L. Shi, D. Boyd, J. Ott, N. Klymko, F. Cardone, L. Tai, S. Koester, M. Cobb, D. Canaperi, B. To, E. Duch, I. Babich, R. Carruthers, P. Saunders, G. Walker, M. Steen and M. Ieong, Proc. IEDM 2003 Conf. p. 49.

  6. 6.

    T.S. rake, C. Ni Chleirigh, M.L. Lee, E.A. Fitzgerald, D.A. Antoniadis, D.H. Anjum, J. Li, R. Hull, N. Klymko and J.L. Hoyt, Appl. Phys. Lett. 83, 875 (2003); 7. www.soitec.com.

    Article  Google Scholar 

  7. 8.

    A.J. Auberton-Hervé and C. Maleville, Proc. 2002 IEEE SOI Conf. p. 1.

  8. 9.

    H. Moriceau, F. Fournel, O. Rayssac, A.-M. Cartier, C. Morales, S. Pocas, M. Zussy, E. Jallaguier, B. Biasse, A.-M. Papon, C. Lagahe, B. Aspar, C. Maleville, F. Letertre, B. Ghyselen, T. Barge. ElectroChemical Society Proceedings Vol. 2001-27, p1–16.

  9. 10.

    B. Ghyselen, Wafer Bonding VII: Science, Technology and Applications, 96, ECS Proceedings (PV 2003-19, ISBN 1-56677-402-0), Pennington, NJ (2003).

  10. 11.

    J.M. Hartmann, Y. Bogumilowicz, P. Holliger, F. Laugier, R. Truche, G. Rolland, M.N. Séméria, V. Renard, E.B. Olshanetsky, O. Estibal, Z.D. Kvon, J.C. Portal, L. Vincent, F. Cristiano and A. Claverie, Semicond. Sci. Technol. 19, 311 (2004).

    CAS  Article  Google Scholar 

  11. 12.

    K.K. Linder, F.C. Zhang, J.-S. Rieh, P. Bhattacharya and D. Houghton, Appl. Phys. Lett. 70, 3224 (1997).

    CAS  Article  Google Scholar 

  12. 13.

    B. Holländer, St. Lenk, S. Mantl, H. Trinkaus, D. Kirch, M. Luysberg, T. Hackbarth, H.-J. Herzog, P.F.P. Fichtner, Nucl. Instr. and Meth. in Phys. Res. B 175-177 357–367 (2001).

    Article  Google Scholar 

  13. 14.

    C.W. Leitz, M.T. Currie, M.L. Lee, Z.-Y. Cheng, D.A. Antoniadis and E.A. Fitzgerald, J. Appl. Phys. 92, 3745 (2002).

    CAS  Article  Google Scholar 

  14. 15.

    B. Ghyselen, J.-M. Hartmann, T. Ernst, C. Aulnette, B. Osternaud, Y. Bogumilowicz, A. Abbadie, P. Besson, O. Rayssac, A. Tiberj, N. Daval, I. Cayrefourq, F. Fournel, H. Moriceau, C. Di Nardo, F. Andrieu, V. Paillard, M. Cabié, L. Vincent, E. Snoeck, F. Cristiano, A. Rocher, A. Ponchet, A. Claverie, P. Boucaud, M.-N. Semeria, D. Bensahel, N. Kernevez and C. Mazure. To be pulished in Solid State Electronics / Special issue on strained Si and heterostructures and Devices–August 2004

    Google Scholar 

  15. 16.

    J.M. Hartmann, A. Abbadie, M. Vinet, L. Clavelier, P. Holliger, D. Lafond, M.N. Séméria and P. Gentile, J. Cryst. Growth 257, 19 (2003).

    CAS  Article  Google Scholar 

  16. 17.

    N. Sugiyama, Y. Moriyama, T. Tezuka, T. Mizuno, S. Nakahari, K. Usuda and S. Takagi, Jpn. J. Appl. Phys. 42, 4476 (2003).

    CAS  Article  Google Scholar 

  17. 18.

    A. Tiberj, V. Paillard, C. Aulnette, N. Daval, K. Bourdelle, M. Moreau, M. Kennard and I. Cayrefourcq; these proceedings (MRS Spring 2004; Symposium B).

  18. 19.

    K. D. Hobart, F.J. Kub, M. Fatemi, M.E. Twigg, P.E. Thompson, T.S. Kuan, and C.K. Inoki, Journal of ELECTRONIC MATERIALS, Vol.29, N°7, 2000 (pp897-900).

    Google Scholar 

  19. 20.

    A. Claverie and Z. Liliental-Weber, Phil. Mag. A, V65, 981–1002 (1992).

    Article  Google Scholar 

Download references

Acknowledgments

The authors want to acknowledge the teams of LETI and SOITEC that made this work possible. This program has been supported by the French “Réseau Micro-Nanotechnologies (RMNT)” and the French “Ministère de l'Industrie”.

Author information

Affiliations

Authors

Corresponding author

Correspondence to B. Ghyselen.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Ghyselen, B., Bogumilowicz, Y., Aulnette, C. et al. Strained Silicon on Insulator wafers made by the Smart Cut™ technology. MRS Online Proceedings Library 809, 23 (2003). https://doi.org/10.1557/PROC-809-B2.3

Download citation