NMOS devices have been successfully fabricated on SSOI wafers. The SSOI wafer fabrication is by direct wafer bonding and wafer transfer by splitting of the strained Si on thin SiGe virtual substrate to an oxidized wafer. The thin SiGe virtual substrate is fabricated by strained SiGe deposition, H2+ implantation, and SiGe lattice relaxation anneal. This relaxation process creates a confined defect zone at the SiGe to Si substrate interface that ensures low defect strained Si growth. 10 µm by 10 µm NMOS SSOI devices show an improvement of 100% in drive current and 115% in transconductance. A near ideal subthreshold swing was observed on NMOS devices with channel length as short as 0.1 µm.
This is a preview of subscription content, access via your institution.
Buy single article
Instant access to the full article PDF.
Tax calculation will be finalised during checkout.
T.A. Langdo, A. Lochtefeld, M.T. Currie, R. Hammond, V.K. Yang, J.A. Carlin, C.J. Vineis, G. Braithwaite, H. Badawi, M.T. Bulsara, and E.A. Fitzgerald, in Proc. IEEE Int. SOI Conf., Oct. 2002, pp. 211–212.
K. Rim, K. Chan, L. Shi, D. Boyd, J. Ott, N. Klymko, F. Cardone, L. Tai, S. Koester, M. Cobb, D. Canaperi, B. To, E. Duch, I. Babich, R. Carruthers, P. Saunders, G. Walker, Y. Zhang, M. Steen, and M. Ieong, in IEDM Tech. Dig., 2003, pp. 49–52.
I. Lauer, T.A. Langdo, Z.Y. Cheng, J.G. Fiorenza, G. Braithwaite, M.T. Currie, C.W. Leitz, A. Lochtefeld, H. Badawi, M.T. Bulsara, M. Somerville, and D.A. Antoniadis, IEEE Electron Device Lett., vol. 25, pp. 83–85, Feb. 2004.
S. Takagi, T. Mizuno, T. Tezuka, N. Sugiyama, T. Numata, K. Usuda, Y. Moriyama, S. Nakaharai, J. Koga, A. Tanabe, N. Hirashita, and T. Maeda, in IEDM Tech. Dig., 2003, pp.57–60.
H. Trinkaus, B. Hollander, St. Rongen, S. Mantl, H.-J. Herzog, J. Kuchenbecker, and T. Hackbarth, Appl. Phys. Lett., vol. 76, pp 3552–3554, 2000.
J.J. Lee, J.S. Maa, D. J. Tweet, S.T. Hsu, K. Fujii, T. Baba, T. Ueda, T. Naka, and N. Awaya, “in Proc. 3rd ICSI3, Santa Fe, New Mexico, March 2003, pp. 135–137.
J.S. Maa, D.J. Tweet, J.J. Lee, S.T. Hsu, K. Fujii, T. Naka, T. Ueda, T. Baba, N. Awaya, and K. Sakiyama, MRS Proc. Vol. 765, pp. 135–140, 2003.
M. Bruel, B. Aspar, and A.J. Auberton-Herve, Jpn. J. Appl. Phys., vol. 36, no. 3B, pp. 1636–1641, 1997.
R. People, IEEE J. Quantum Electron., vol 22, pp. 1696–1710, Sept, 1986.
T. Yamada, J.R. Zhou, H. Miyata, and D.K. Ferry, IEEE Trans. Electron Devices, vol. 41, pp. 1513–1522, Sept, 1994.
K. Rim, J.L. Hoyt, and J.F. Gibbons, IEEE Trans. Electron Devices, vol. 47, pp. 1406–1415, July, 2000.
J.S. Goo, Q. Xiang, Y. Takamura, H. Wang, J. Pan, F. Arasnia, E.N. Paton, P. Besser, M.V. Sidorov, E. Adem, A. Lochtefeld, G. Braithwaite, M.T. Currie, R. Hammond, M.T. Bulsara, and M.R. Lin, IEEE Electron Device Lett., vol. 24, pp. 351–353, May 2003.
About this article
Cite this article
Lee, J., Maa, J., Tweet, D.J. et al. Fabrication of Strained Silicon on Insulator (SSOI) by Direct Wafer Bonding Using Thin Relaxed SiGe Film as Virtual Substrate. MRS Online Proceedings Library 809, 22 (2003). https://doi.org/10.1557/PROC-809-B2.2