Reverse Diode Leakage in Spike-Annealed Ultra-Shallowjunctions

Abstract

We have investigated diode leakage in junctions produced by ion-implantation of B with energies of 0.5 - 2 keV and doses of 2 × 10¹⁴ — 2 × 10¹⁵ cm^-2 into n-type wells of ∼1 × 10¹⁸ cm^-3, after rapid-thermal anneals (RTA) in lamp-based and hot-wall furnaces. Junc- tions are as shallow as 30nm and were directly probed to avoid complications arising from metalization. The leakage current, I_lkg, was found to be independent of the implant dose at any reverse voltage (-1 and -5 V). This implies that the electrically active defects are sufficiently far removed and on the surface-side of the junction. In both systems, a spike anneal (no intentional dwell time at peak-temperature) resulted in higher I_lkg than a soak anneal (dwell time of several seconds at peak-temperature). However, for the same spike annealing recipe, the hot-wall RTA produces tighter distributions than the lamp-based RTA. The width of the distribution is a mea- sure of the temperature uniformity across the wafer. Best leakage currents are of the order 1 × 10^-6 A/cm², in good agreement with device simulations The shallowest junctions exhibit I_lkg ∼5 × 10^-4 A/cm², still well below the specification of even the low power transistor of a 100 nm technology.