The off currents in high performance a-Si:H TFT’s were measured below 10−12 A. The Ioff-Vgs behavior is similar to that of a poly-Si TFT, in which the current increases rapidly with negative gate bias under a large drain bias while it stays almost constant under a small drain voltage. It seems the thermally-assisted tunneling via localized states occurs near the drain region as in the case of poly-Si TFT, although the current level is quite different. The off current change after negative bias stress at room temperature can be explained by the defect creation, but defects can be reduced by negative stress at 180 °C according to the defect pool model.
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Yoon, JK., Choi, WS., Jang, YH. et al. Very low off Current Behavior in high Performance a-Si:H TFT. MRS Online Proceedings Library 377, 743–748 (1995). https://doi.org/10.1557/PROC-377-743