This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region.
A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10−7 Ω−1.cm−1 Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.
This is a preview of subscription content, access via your institution.
Buy single article
Instant access to the full article PDF.
Tax calculation will be finalised during checkout.
P. Bruesch, T. Stockmeier, F. Stucki and P.A. Buffat, J. Appl. Phys. 73, 7677 (1993).
D. Jaume, G. Charitat and P. Rössel, IEEE Trans. Elec. Devices ED-38, 1681 (1991).
T-Y. Huang, I.W. Wu, A.G. Lewis and R.H. Bruce, IEEE Elec. Dev. Letts. 11, 244 (1990).
Y. Uemoto, E. Fujii, F. Emoto and K. Senda, IEEE Trans. Elec. Devices ED-38, 95 (1991).
K. Tanaka, K. Nakazawa and K. Kata, IEEE Trans. Elec. Devices ED-39, 916 (1992).
K.M. Johnson and G. Moddel, Applied Optics 28, 4888 (1989).
E.M. Sankara Narayanan, F.J. Clough and W.I. Milne, ISEM, Seoul, Korea, June (1994).
S. Lombardo, S.U. Campisano and F. Baroetto, Phys. Rev. B 47, 13561 (1993).
S. Lombardo, S.U. Campisano and F. Baroetto, Appl. Phys. Letts. 63, 470 (1993).
P.J. England and J.G. Simmons, Solid State Electronics 32, 131 (1989).
J. Batey and E. Tierney, J. Appl. Phys. 60, 3136 (1986).
TMA-MEDICIV 2.0 and Trapped Charge AAM, Technology Modelling Associates Inc., Palo Alto, USA.
Technology Modelling Associates Inc., Palo Alto, USA (private communication).
N.F. Mott, Phil. Mag. 19, 835 (1969).
G. Lucovsky, J. Yang, S.S. Chao and W. Czubaty, Phys. Rev. B 28, 3225 (1983).
D.J. Olego and H. Baumgart, J. Appl. Phys. 63, 2669 (1988).
M. Hamasaki, T. Adachi and M. Kikuchi, J. Appl. Phys. 49, 3987 (1978).
J. Ni and E. Arnold, Appl. Phys. Letts. 39, 554 (1981).
About this article
Cite this article
Clough, F.J., Chen, Y., Brown, A.O. et al. A Semi-Insulating Layer for Novel High Voltage Polysilicon Thin Film Transistors. MRS Online Proceedings Library 377, 731–736 (1995). https://doi.org/10.1557/PROC-377-731