High-Performance Two-Dimensional InSe Field-Effect Transistors with Novel Sandwiched Ohmic Contact for Sub-10 nm Nodes: a Theoretical Study
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Two-dimensional (2D) InSe-based field effect transistor (FET) has shown remarkable carrier mobility and high on-off ratio in experimental reports. Theoretical investigations also predicated the high performance can be well preserved at sub-10 nm nodes in the ballistic limit. However, both experimental experience and theoretical calculations pointed out achieving high-quality ohmic has become the main limiting factor for high-performance 2D FET. In this work, we proposed a new sandwiched ohmic contact with indium for InSe FET and comprehensively evaluated its performance from views of material and device based on ab initio methods. The material properties denote that all of fundamental issues of ohmic contact including tunneling barrier, the Schottky barrier, and effective doping are well concerned by introducing the sandwiched structure, and excellent contact resistance was achieved. At device performance level, devices with gate length of 7, 5, and 3 nm were investigated. All metrics of sandwiched contacted devices far exceed requirement of the International Technology Roadmap for Semiconductors (ITRS) and exhibit obvious promotion as compared to conventional structures. Maximum boost of current with 69.4%, 50%, and 49% are achieved for devices with 7, 5, and 3 nm gate length, respectively. Meanwhile, maximum reduction of the intrinsic delay with 20.4%, 16.7%, and 18.9% are attained. Moreover, a benchmark of energy-delay product (EDP) against other 2D FETs is presented. All InSe FETs with sandwiched ohmic contact surpass MoS2 FETs as well as requirement from ITRS 2024. The best result approaches the upper limit of ideal BP FET, denoting superior preponderance of sandwiched structures for InSe FETs in the next generation of complementary metal-oxide semiconductor (CMOS) technology.
KeywordsInSe Field-effect transistor Density functional theory Non-equilibrium Green function Ohmic contact
Complementary metal-oxide semiconductor
Transition metal dichalcogenides
- 2D FET
2D materials-based FET
International Technology Roadmap for Semiconductors
van der Waals
Non-equilibrium Green’s function
The density of states
Two-dimensional (2D) semiconductors have attracted much interest in electronic devices due to their appealing applications for the next generation of complementary metal-oxide semiconductor (CMOS) technology [1, 2]. Their ultra-thin thickness and good dielectric property can provide excellent electrostatic gate control to suppress the well-known short channel effects . In addition, as few layers of 2D materials usually possess smooth surface with lack of dangle bonds, superiority carrier mobility of 2D materials can be well preserved in ultrathin body systems as compared to conventional semiconductor . Except for the gapless graphene, most of synthesized 2D semiconductors like transition metal dichalcogenides (TMDs), black phosphorus (BP), and indium selenide (InSe) possess none-zero band gap and are demonstrated to be suitable for field-effect transistor (FET). TMDs-based FETs have shown high on-off ratio as much as 108 and low leakage current in short channel devices, benefitting from the heavy effective mass . BP-based FETs have presented outstanding current and switching characteristic , due to the high mobility of ~ 1000 cm2/V s and anisotropic transport property . Recently, InSe was demonstrated to present a superiority mobility of ~ 2000 cm2/V s at room temperature [8, 9], and FET based on InSe revealed a high on-off ratio of 108 . First-principle calculations also identified that InSe FET can be well scaled down to sub-10 nm in the ballistic limit [11, 12]. However, due to the neglect of contact resistance and hypothesis of heavily doping, approaching the theoretical limit is still challenging in real applications. In fact, as reliable doping method and way to high-quality ohmic contact are still lacking, FETs based on 2D materials including InSe are usually Schottky barrier (SB) FET [13, 14, 15, 16]. The SB at the active regions yields large contact resistance, and low doping level further degrades current density. Achieving low contact resistance with sufficiently doped active regions has become the main limiting factor for 2D materials-based FET (2D FET) to achieve high performance [17, 18, 19].
Aiming at above issues, we proposed a novel sandwiched ohmic contact for InSe FET. Indium was selected as the electrode metal, as recent experimental and theoretical studies suggest that indium can be a promising candidate for InSe FET to achieve good performance [20, 21, 22]. We theoretically evaluated the ohmic contact quality and performance of devices with gate length of 7, 5, and 3 nm following the framework of the International Technology Roadmap for Semiconductors 2013 (ITRS) . It should be noted although ITRS has been replaced by the International Roadmap for Devices and Systems (IRDS) , ITRS2013 presents a clear scaling trend for transistor and has been still adopted in recent studies [25, 26]. This manuscript is arranged as follows: first, electrical properties of sandwiched and conventional (top) contacts are investigated. Second, device performance metrics such as on-state current and intrinsic delay are evaluated and compared with requirements of ITRS. Finally, benchmark of power-delay product versus intrinsic delay is presented to compare against other 2D materials-based devices.
Device parameters following ITRS and IRDS requirement
Where,VBias is the bias and can be achieved by: VBias = VR ‐ VL, T(E, VL, VR) is the transmission coefficient of carriers, fR(E, VR) and fL(E, VL) are the Fermi-Dirac distribution function for cathode (drain) and anode (source), respectively.
Results and discussion
In this work, a new sandwiched ohmic contact with indium was proposed for InSe FET. The sandwiched ohmic contact not only doubles the contact region but also promotes the contact quality more than twice, leading to an excellent contact resistance. At device performance level of gate length 7, 5, and 3 nm, InSe FETs with sandwiched ohmic contact present universal performance promotion as compared to conventional top contacted devices. Under the requirement of HP from ITRS, on-state current and intrinsic delay are improved with 38.2~20.5% and 20.4~16.7%, respectively. A benchmark of EDP against other 2D FETs also reveals that InSe FETs with sandwiched ohmic contact have advantages over other 2D FETs. Our study offers a new route toward high-performance InSe FETs.
The authors are grateful for the computational resource provided by HPC system of Xidian University.
JZ designed and performed the calculations and wrote the manuscript. JN and DW participated in this work and analyzed the data. JZ proposed the initial idea and provided the software. LG and YH revised the manuscript. All authors read and approved the final manuscript.
This work was supported by 111 project (Grant No. B12026), National Natural Science Foundation of China (No. 61604115, 11435010, 61474086, and 61334002), the Fundamental Research Funds for the Central Universities (JB191109), and the Natural Science Basic Research Plan in Shaanxi Province of China (program No. 2019ZDLGY16-03).
The authors declare that they have no competing interests.
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