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High Efficiency EBCOT with Parallel Coding Architecture for JPEG2000

  • Jen-Shiun ChiangEmail author
  • Chun-Hau Chang
  • Chang-Yo Hsieh
  • Chih-Hsien Hsia
Open Access
Research Article

Abstract

This work presents a parallel context-modeling coding architecture and a matching arithmetic coder (MQ-coder) for the embedded block coding (EBCOT) unit of the JPEG2000 encoder. Tier-1 of the EBCOT consumes most of the computation time in a JPEG2000 encoding system. The proposed parallel architecture can increase the throughput rate of the context modeling. To match the high throughput rate of the parallel context-modeling architecture, an efficient pipelined architecture for context-based adaptive arithmetic encoder is proposed. This encoder of JPEG2000 can work at 180 MHz to encode one symbol each cycle. Compared with the previous context-modeling architectures, our parallel architectures can improve the throughput rate up to 25%.

Keywords

Information Technology Computation Time High Throughput Quantum Information Block Code 

References

  1. 1.
    Information technology—JPEG 2000 image coding system—Part 1: Core coding system, ISO/IEC 15444-1, December 2000Google Scholar
  2. 2.
    Taubman D, Marcellin M: JPEG2000: Image Compression Fundamentals, Standards, and Practice. Kluwer Academic, Dordrecht, The Netherlands; 2001.Google Scholar
  3. 3.
    Christopoulos C, Skodras A, Ebrahimi T: JPEG2000 still image coding system: an overview. IEEE Transactions on Consumer Electronics 2000, 46(4):1103–1127. 10.1109/30.920468CrossRefGoogle Scholar
  4. 4.
    Christopoulos C, Ebrahimi T, Skodras AN: JPEG2000: the new still picture compression standard. Proceedings of the ACM Multimedia 2000 Workshops, October–November 2000, Los Angeles, Calif, USA 45–49.CrossRefGoogle Scholar
  5. 5.
    Taubman D: High performance scalable image compression with EBCOT. IEEE Transactions on Image Processing 2000, 9(7):1158–1170. 10.1109/83.847830CrossRefGoogle Scholar
  6. 6.
    Taubman D, Ordentlich E, Weinberger M, Seroussi G, Ueno I, Ono F: Embedded block coding in JPEG2000. In Tech. Rep. HPL-2001-35. HP Labs, Palo Alto, Calif, USA; February 2001.Google Scholar
  7. 7.
    Taubman D, Ordentlich E, Weinberger M, Seroussi G, Ueno I, Ono F: Embedded block coding in JPEG2000. Proceedings of IEEE International Conference on Image Processing, September 2000, Vancouver, BC, Canada 2: 33–36.CrossRefGoogle Scholar
  8. 8.
    Adams MD, Kossentini F: JasPer: a software-based JPEG-2000 codec implementation. Proceedings of IEEE International Conference on Image Processing, September 2000, Vancouver, BC, Canada 2: 53–56.CrossRefGoogle Scholar
  9. 9.
    Santa-Cruz D, Ebrahimi T: An analytical study of JPEG 2000 functionalities. Proceedings of IEEE International Conference on Image Processing, September 2000, Vancouver, BC, Canada 2: 49–52.CrossRefGoogle Scholar
  10. 10.
    Lian C-J, Chen K-F, Chen H-H, Chen L-G: Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000. IEEE Transactions on Circuits and Systems for Video Technology 2003, 13(3):219–230. 10.1109/TCSVT.2003.809833CrossRefGoogle Scholar
  11. 11.
    Chen H-H, Lian C-J, Chang T-H, Chen L-G: Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000. Proceedings of IEEE International Symposium on Circuits and Systems, May 2002, Scottsdale, Ariz, USA IV: 329–332.Google Scholar
  12. 12.
    Chiang J-S, Lin Y-S, Hsieh C-Y: Efficient pass-parallel architecture for EBCOT in JPEG2000. Proceedings of IEEE International Symposium on Circuits and Systems, May 2002, Scottsdale, Ariz, USA I: 773–776.Google Scholar
  13. 13.
    Ong K-K, Chang W-H, Tseng Y-C, Lee Y-S, Lee C-Y: A high throughput context-based adaptive arithmetic codec for JPEG2000. Proceedings of IEEE International Symposium on Circuits and Systems, May 2002, Scottsdale, Ariz, USA 4: 133–136.Google Scholar
  14. 14.
    Wu A-Y, Liu KJR, Zhang Z, Nakajima K, Raghupathy A: Low-power design methodology for DSP systems using multirate approach. Proceedings of IEEE International Symposium on Circuits and Systems, May 1996, Atlanta, Ga, USA 4: 292–295.Google Scholar
  15. 15.
    Chiang J-S, Chang C-H, Lin Y-S, Hsieh C-Y, Hsia C-H: High-speed EBCOT with dual context-modeling coding architecture for JPEG2000. Proceedings of IEEE International Symposium on Circuits and Systems, May 2004, Vancouver, BC, Canada 3: 865–868.Google Scholar

Copyright information

© Jen-Shiun Chiang et al. 2006

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Authors and Affiliations

  • Jen-Shiun Chiang
    • 1
    Email author
  • Chun-Hau Chang
    • 1
  • Chang-Yo Hsieh
    • 1
  • Chih-Hsien Hsia
    • 1
  1. 1.Department of Electrical Engineering, College of EngineeringTamkang UniversityTamsui, TaipeiTaiwan

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