Abstract
This paper presents a formal Boolean-algebra-based synthesis of three auxiliary algorithms implementing preliminary assessment methods for stuck-at faults detection tests.
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Novichkov, S.V., Development Trends in Computer-Aided Design Means for Crystal-Based Systems, in Problemy razrabotki perspektivnykh mikroelektronnykh sistem (Design Problems of Promising Microelectronic Systems), Stempkovskii, A.L., Ed., Moscow: Inst. Probl. Proektir. Mikroelektron., 2005, pp. 412–418.
Osnovy tekhnicheskoi diagnostiki (Principles of Technical Diagnostics), Parkhomenko, P.P., Ed., Moscow: Energiya, 1976.
Automatic Test Pattern Generation (ATPG), http://www.siliconfareast.com/atpg.htm.
Speranskii, D.V., Modelirovanie, testirovanie i diagnostika tsifrovykh ustroistv (Modeling, Testing and Diagnostics of Digital Devices), Moscow: Internet-Univ. Inform. Tekh. (INTUIT), 2012.
Benso, A., Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation, New York: Kluwer, 2003.
Stepanov, Yu.L., Shchubarev, V.A., Bol’shakov, A.A., Kim, M.A., and Grishkin, V.M., A Preliminary Quality Assessment Method for Detection Tests, RF Patent RU 2 475 821, Byull. Izobret., 2013, no. 5.
Khan, O.I., Bushnell, M.L., Devanathan, S.K., and Agrawal, V.D., SPARTAN: A Spectral and Information Theoretic Approach to Partial Scan, Proc. Int. Test Conf., 2007, pp. 21.1.1–21.1.10.
Petrukhnova, G.V., Quality Criteria Synthesis for In-Circuit Tests Based on the Minimum Symmetry Principle, Tr. Mosk. Aviats. Inst. Mikroelektron. Inform., 1997, vol. 2, pp. 357–363.
Petrukhnova, G.V., Software Development for Digital Nodes Checking Systems Based on Automorphisms of Test Sequences, Cand. Sci. (Eng.) Dissertation, Voronezh: State Technical Univ., 1999, p. 138.
Tyurin, S.V., Podvalny, S.L., and Anikina, Yu.S., A Method of Testable Design of Logical Converters, in Problemy razrabotki perspektivnykh mikro- i nanoelektronnykh sistem (Design Problems of Promising Micro- and Nanoelectronic Systems), Stempkovskii, A.L., Ed., Moscow: Inst. Probl. Proektir.Mikroelektron., 2010, pp. 36–41.
Kinoshita, K., Asada, K., and Karatsu, O., Logic Design for VLSI, Tokyo: Iwanami Shoten Publishers, 1985. Translated under the title Logicheskoe proektirovanie SBIS, Moscow: Mir, 1988.
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Original Russian Text © S.A. Belozorov, S.V. Tyurin, Yu.Ya. Agranovich, 2014, published in Sistemy Upravleniya i Informatsionnye Tekhnologii, 2014, No. 2, pp. 62–66.
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Belozorov, S.A., Tyurin, S.V. & Agranovich, Y.Y. Synthesis of auxiliary algorithms for preliminary assessment of stuck-at faults detection tests. Autom Remote Control 75, 1875–1879 (2014). https://doi.org/10.1134/S0005117914100142
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DOI: https://doi.org/10.1134/S0005117914100142