Abstract
We consider a complete set of codes with unit bits summation used to organize combinational logic in logical devices. We propose new modified codes and establish their data bits errors detection properties. We also give a classification of codes.
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Original Russian Text © A.A. Blyudov, D.V. Efanov, V.V. Sapozhnikov, Vl.V. Sapozhnikov, 2014, published in Avtomatika i Telemekhanika, 2014, No. 8, pp. 131–145.
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Blyudov, A.A., Efanov, D.V., Sapozhnikov, V.V. et al. On codes with summation of data bits in concurrent error detection systems. Autom Remote Control 75, 1460–1470 (2014). https://doi.org/10.1134/S0005117914080098
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DOI: https://doi.org/10.1134/S0005117914080098