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Nondestructive RAM Testing by Analyzing the Output Data for Symmetry

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Abstract

For the nondestructive march memory testing based on the symmetry analysis of the read out flows of output data, consideration was given to the conditions for manifestation of the bit-stuck, transition, and coupling faults and to construction of algorithms providing their hundred-percent covering by a minimum-complexity test and its minimum-complexity hardware realization.

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REFERENCES

  1. Mazumder, P. and Chakraborty, K., Testing and Testable Design of High-Density Random-Access Memories, Chichester: Addison-Wesley, 1997.

    Google Scholar 

  2. Prince, B., High-performance Memories: New Architecture DRAM's and SRAM's, Evolution and Function, Chichester: Wiley, 1996.

    Google Scholar 

  3. Kinoshita, K. and Saluja, K.K., Built-In Self Testing of Memory Using an On-chip Compact Testing Scheme, IEEE Trans. Comput., 1986, pp. 862-870.

  4. McCluskey, E.J., Built-In Self-Test Techniques, IEEE Design & Test Comput., 1985, vol. 2, no.2, pp. 21-28.

    Google Scholar 

  5. Suk, D. and Reddy, S., A March Test for Functional Faults in Semiconductor Random Access Memory, IEEE Trans. Comput., 1981, vol. C-30, no12, pp 982-985.

    Google Scholar 

  6. Zakrevskii, L.A., Ivanyuk, A.A., Yanushkevich, A.I., and Yarmolik, V.N., Nondestructive Testing of Memory Elements by Built-In Parity-Check Facilities, Avtom. Telemekh., 1999, no. 2, pp. 120-128.

    Google Scholar 

  7. Nicolaidis, M., Transparent BIST for RAMs, Int. Test Conf., 1992, pp. 596-607.

  8. Yarmolik, V.N., Hellebrand, S., and Wundelich, H.-J., Symmetric Transparent BIST for RAMs, Proc. DATE Conf., 1999, pp. 702-707.

  9. Goor, A.J. van de., Testing Semiconductor Memories: Theory and Practice, Chichester: Wiley, 1991.

    Google Scholar 

  10. Goor, A.J. van de, Offerman, A., and Schanstra, H.I., Towards a Uniform Notation for Memory Tests, Proc. Eur. Design & Test Conf., pp. 420-427.

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Authors and Affiliations

  1. Belarussian State University of Informatics and Radioelectronics, Minsk, Belarus

    A. P. Zankovich & V. N. Yarmolik

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  1. A. P. Zankovich
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  2. V. N. Yarmolik
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Zankovich, A.P., Yarmolik, V.N. Nondestructive RAM Testing by Analyzing the Output Data for Symmetry. Automation and Remote Control 64, 1488–1500 (2003). https://doi.org/10.1023/A:1026008220905

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