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Baby Chellam, M., Natarajan, R. Correction to: AES Hardware Accelerator on FPGA with Improved Throughput and Resource Efficiency . Arab J Sci Eng 44, 2861 (2019). https://doi.org/10.1007/s13369-018-3095-4
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DOI: https://doi.org/10.1007/s13369-018-3095-4