Microwave-Assisted Size Control of Colloidal Nickel Nanocrystals for Colloidal Nanocrystals-Based Non-volatile Memory Devices
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Colloidal synthesis and size control of nickel (Ni) nanocrystals (NCs) below 10 nm are reported using a microwave synthesis method. The synthesised colloidal NCs have been characterized using x-ray diffraction, transmission electron microscopy (TEM) and dynamic light scattering (DLS). XRD analysis highlights the face centred cubic crystal structure of synthesised NCs. The size of NCs observed using TEM and DLS have a distribution between 2.6 nm and 10 nm. Furthermore, atomic force microscopy analysis of spin-coated NCs over a silicon dioxide surface has been carried out to identify an optimum spin condition that can be used for the fabrication of a metal oxide semiconductor (MOS) non-volatile memory (NVM) capacitor. Subsequently, the fabrication of a MOS NVM capacitor is reported to demonstrate the potential application of colloidal synthesized Ni NCs in NVM devices. We also report the capacitance–voltage (C–V) and capacitance–time (C–t) response of the fabricated MOS NVM capacitor. The C–V and C–t characteristics depict a large flat band voltage shift (VFB) and high retention time, respectively, which indicate that colloidal Ni NCs are excellent candidates for applications in next-generation NVM devices.
KeywordsNanocrystals (NCs)-based non-volatile memory (NVM) XRD TEM DLS spin-coating AFM fabrication and characterization flat band voltage shift (VFB)
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The authors gratefully acknowledge the financial support received from the Ministry of Electronics and Information Technology, Government of India, and the Indian Institute of Technology Ropar. The authors would like to thank the Indian Institute of Science, Bangalore, for their support in carrying out device fabrication and providing access to the HRTEM facility.
- 5.K.H. Chen, C.M. Cheng, M.C. Kao, K.C. Chang, T.C. Chang, T.M. Tsai, S. Wu, and F.Y. Su, J. Electron. Mater. 46, 4 (2017).Google Scholar
- 6.S.F. Wang, C.C. Hsu, J.P. Chu, Y.X. Liu, and L.W. Chen, J. Electron. Mater. 46, 3 (2017).Google Scholar
- 12.International Technology Roadmap for Semiconductors (ITRS) (2015).Google Scholar
- 13.X. Wang, W. Xie, and J.B. Xu, Adv. Mater. 26, 31 (2014).Google Scholar
- 15.G. Zhou, B. Wu, Z. Li, Z. Xiao, S. Li, and P. Li, Curr. Appl. Phys. 15, 3 (2015).Google Scholar
- 19.J. Kim, D. Son, M. Lee, C. Song, J.K. Song, J.H. Koo, D.J. Lee, H.J. Shim, J.H. Kim, M. Lee, T. Hyeon, and D.H. Kim, Sci. Adv. 2, 1 (2016).Google Scholar
- 24.G. Tian, N. Jia, S. Qi, and D. Wu, J. Electron. Mater. 44, 10 (2015).Google Scholar
- 25.E.K. Kim, J.H. Kim, H.K. Noh, and Y.H. Kim, J. Electron. Mater. 35, 4 (2006).Google Scholar
- 28.M. Yadav, R.S.R. Velampati, D. Mandal, and R. Sharma, Proceedings of the 13th IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC 2017), Hsinchu (2017).Google Scholar
- 29.D. Li and S. Komarneni, J. Am. Ceram. Soc. 89, 5 (2006).Google Scholar
- 30.M. Kaszuba, D. Mcknight, M.T. Connah, F.K.M. Watson, and U. Nobbmann, J. Nanopart. Res. 10, 5 (2008).Google Scholar