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LWIR HgCdTe on Si detector performance and analysis

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Abstract

We have fabricated a series of 256 pixel×256 pixel, 40 µm pitch LWIR focal plane arrays (FPAs) with HgCdTe grown on (211) silicon substrates using MBE grown CdTe and CdSeTe buffer layers. The detector arrays were fabricated using Rockwell Scientific’s double layer planar heterostructure (DLPH) diode architecture. The 78 K detector and focal plane array (FPA) performance are discussed in terms of quantum efficiency (QE), diode dark current and dark current operability. The FPA dark current and the tail in the FPA dark current operability histograms are discussed in terms of the HgCdTe epitaxial layer defect density and the dislocation density of the individual diode junctions. Individual diode zero bias impedance and reverse bias current-voltage (I-V) characteristics vs. temperature are discussed in terms of the dislocation density of the epitaxial layer, and the misfit stress in the epitaxial multilayer structure, and the thermal expansion mismatch in the composite substrate. The fundamental FPA performance limitations and possible FPA performance improvements are discussed in terms of basic device physics and material properties.

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Carmody, M., Pasko, J.G., Edwall, D. et al. LWIR HgCdTe on Si detector performance and analysis. J. Electron. Mater. 35, 1417–1422 (2006). https://doi.org/10.1007/s11664-006-0277-8

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  • DOI: https://doi.org/10.1007/s11664-006-0277-8

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