Efficient approximate core transform and its reconfigurable architectures for HEVC

Original Research Paper
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Abstract

This paper describes a new approximate transform for the high efficiency video coding (HEVC). A 8 × 8 discrete cosine transform (DCT) approximation is proposed and then down-sampled or expanded to generate the 4 × 4, 16 × 16, and 32 × 32 approximate matrices. The proposed 8 × 8 approximation is carried out in part by neighbourhood in order to take the advantage of adjacent pixels correlation of natural images. Hence, rather than approximating the odd basis vectors of DCT kernel by referring to their intrinsic values, we choose to quantize that by taking into account their signs and positions. The proposed approximation matrices respect the properties of transform matrices prescribed by HEVC like orthogonality and bit-length of the basis vector elements. Furthermore, they have nearly the same arithmetic complexity and hardware requirement as those of recently proposed related methods, but involve significantly less error energy. Moreover, a reconfigurable design based on the 8 × 8 approximation transform is proposed in order to allow the simultaneous computation of eight 4-, four 8-, two 16-, or one 32-point approximate DCTs. It is found that the reconfigurable design can involve nearly 26% less area-delay product (ADP) when compared with the separate non-reconfigurable designs. Experimental results obtained from FPGA prototype and HM simulations have demonstrated the advantages of the proposed transforms.

Keywords

Discrete cosine transform (DCT) Approximation High efficiency video coding (HEVC) FPGA-based hardware implementation 

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Copyright information

© Springer-Verlag GmbH Germany, part of Springer Nature 2018

Authors and Affiliations

  1. 1.Equipe Vision, ISEN Brest, CS 42807BrestFrance
  2. 2.School of Computer EngineeringNanyang Technological UniversitySingaporeSingapore

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