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Journal of Real-Time Image Processing

, Volume 14, Issue 3, pp 517–534 | Cite as

A flexible mixed-signal image processing pipeline using 3D chip stacks

  • Lan Shi
  • Christopher Soell
  • Benjamin Pfundt
  • Andreas Baenisch
  • Marc Reichenbach
  • Juergen Seiler
  • Thomas Ussmueller
  • Robert Weigel
Special Issue Paper

Abstract

This work presents a highly flexible mixed-signal CMOS image sensor suitable for smart camera applications. These systems need to fit different constraints regarding power consumption, speed and quality, and the optimal compromise may differ depending on the application. Moreover, the best implementation of a desired image processing task may be in the analog or the digital domain, or even a combined computation. Different aspects starting from the image sensor and signal acquisition up to the pre-processing in analog and digital domain are investigated in this paper to optimize not just one part of the system, but the whole system altogether. Moreover, it is shown that analog processing algorithms can improve signal quality, processing speed and latency while being able to save power, which is important for real-time systems. In order to be able to carry out spatial operations, the state-of-the-art sensor is modified to be able to read out multiple pixels at the same time. This allows analog spatial filter operations which consume significantly less power. As an example, an averaging filter is described which needs less than 5.3 % of the power–time product of a digital implementation for one computation. To enhance data throughput and flexibility, 3D chip stacking is proposed to partition the sensor in smaller units and enable massively parallel processing.

Keywords

Smart camera Analog pre-processing Application optimized image pipeline 3D chip stacking Partitioning 

Notes

Acknowledgments

The authors would like to thank the “Deutsche Forschungsgemeinschaft” (DFG) for funding this project (GRK 1773 “Heterogeneous Image Systems”).

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Copyright information

© Springer-Verlag Berlin Heidelberg 2016

Authors and Affiliations

  • Lan Shi
    • 1
  • Christopher Soell
    • 1
  • Benjamin Pfundt
    • 2
  • Andreas Baenisch
    • 1
  • Marc Reichenbach
    • 2
  • Juergen Seiler
    • 3
  • Thomas Ussmueller
    • 4
  • Robert Weigel
    • 1
  1. 1.Institute for Electronics EngineeringUniversity of Erlangen-NurembergErlangenGermany
  2. 2.Chair of Computer ArchitectureUniversity of Erlangen-NurembergErlangenGermany
  3. 3.Chair of Multimedia Communications and Signal ProcessingUniversity of Erlangen-NurembergErlangenGermany
  4. 4.Institute for MechatronicsUniversity of InnsbruckTechnikerstrasseAustria

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